Datasheet

S12 Clock, Reset and Power Management Unit (S12CPMU)
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor 403
10.3.2.20 S12CPMU Protection Register (CPMUPROT)
This register protects the following clock configuration registers from accidental overwrite:
CPMUSYNR, CPMUREFDIV, CPMUCLKS, CPMUPLL, CPMUIRCTRIMH/L and CPMUOSC
Read: Anytime
Write: Anytime
0x02FB
76543210
R0000000
PROT
W
Reset 00000000
Figure 10-28. S12CPMU Protection Register (CPMUPROT)
Field Description
0
PROT
Clock Configuration Registers Protection Bit — This bit protects the clock configuration registers from
accidental overwrite (see list of affected registers above):
Writing 0x26 to the CPMUPROT register clears the PROT bit, other write accesses set the PROT bit.
0 Protection of clock configuration registers is disabled.
1 Protection of clock configuration registers is enabled. (see list of protected registers above).