Datasheet

Analog-to-Digital Converter (ADC12B12CV2)
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor 501
0x0024 ATDDR10
R
See Section 14.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 14.3.2.12.2, “Right Justified Result Data (DJM=1)”
W
0x0026 ATDDR11
R
See Section 14.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 14.3.2.12.2, “Right Justified Result Data (DJM=1)”
W
0x0028 -
0x002F
Unimple-
mented
R
00000000
W
Address Name Bit 7 6 5 4 3 2 1 Bit 0
= Unimplemented or Reserved
Figure 14-2. ADC12B12C Register Summary (Sheet 3 of 3)