Datasheet
Freescale’s Scalable Controller Area Network (S12MSCANV3)
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor 617
18.3.3.5 Time Stamp Register (TSRH–TSRL)
If the TIME bit is enabled, the MSCAN will write a time stamp to the respective registers in the active
transmit or receive buffer right after the EOF of a valid message on the CAN bus (see Section 18.3.2.1,
“MSCAN Control Register 0 (CANCTL0)”). In case of a transmission, the CPU can only read the time
stamp after the respective transmit buffer has been flagged empty.
The timer value, which is used for stamping, is taken from a free running internal CAN bit clock. A timer
overrun is not indicated by the MSCAN. The timer is reset (all bits set to 0) during initialization mode. The
CPU can only read the time stamp registers.
Module Base + 0x00XD Access: User read/write
1
1
Read: Anytime when TXEx flag is set (see Section 18.3.2.7, “MSCAN Transmitter Flag Register (CANTFLG)”) and the
corresponding transmit buffer is selected in CANTBSEL (see Section 18.3.2.11, “MSCAN Transmit Buffer Selection Register
(CANTBSEL)”)
Write: Anytime when TXEx flag is set (see Section 18.3.2.7, “MSCAN Transmitter Flag Register (CANTFLG)”) and the
corresponding transmit buffer is selected in CANTBSEL (see Section 18.3.2.11, “MSCAN Transmit Buffer Selection Register
(CANTBSEL)”)
76543210
R
PRIO7 PRIO6 PRIO5 PRIO4 PRIO3 PRIO2 PRIO1 PRIO0
W
Reset: 00000000
Figure 18-36. Transmit Buffer Priority Register (TBPR)
Module Base + 0x00XE Access: User read/write
1
1
Read: Anytime when TXEx flag is set (see Section 18.3.2.7, “MSCAN Transmitter Flag Register (CANTFLG)”) and the
corresponding transmit buffer is selected in CANTBSEL (see Section 18.3.2.11, “MSCAN Transmit Buffer Selection Register
(CANTBSEL)”)
Write: Unimplemented
76543210
R TSR15 TSR14 TSR13 TSR12 TSR11 TSR10 TSR9 TSR8
W
Reset: xxxxxxxx
Figure 18-37. Time Stamp Register — High Byte (TSRH)
Module Base + 0x00XF Access: User read/write
1
76543210
R TSR7 TSR6 TSR5 TSR4 TSR3 TSR2 TSR1 TSR0
W
Reset: xxxxxxxx
Figure 18-38. Time Stamp Register — Low Byte (TSRL)
