Datasheet

Device Overview MC9S12G-Family
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor 67
Table 1-10. 48-Pin LQFP/QFN Pinout for S12GN16 and S12GN32
Function
<----lowest-----PRIORITY-----highest---->
Power
Supply
Internal Pull
Resistor
Package Pin Pin
2nd
Func.
3rd
Func.
4th
Func
5th
Func
CTRL
Reset
State
1 RESET — — — — V
DDX
PULLUP
2 VDDXR — — — — — — —
3 VSSX — — — — — — —
4 PE0
1
EXTAL — — — V
DDX
PUCR/PDPEE Down
5 VSS — — — — — — —
6 PE1
1
XTAL — — — V
DDX
PUCR/PDPEE Down
7 TEST — — — — N.A.
RESET pin Down
8 PJ0 KWJ0 — — — V
DDX
PERJ/PPSJ Up
9 PJ1 KWJ1 — — — V
DDX
PERJ/PPSJ Up
10 PJ2 KWJ2 — — — V
DDX
PERJ/PPSJ Up
11 PJ3 KWJ3 — — — V
DDX
PERJ/PPSJ Up
12 BKGD MODC — — — V
DDX
PUCR/BKPUE Up
13 PP0 KWP0 ETRIG0 API_EXTCLK PWM0 V
DDX
PERP/PPSP Disabled
14 PP1 KWP1 ETRIG1 ECLKX2 PWM1 V
DDX
PERP/PPSP Disabled
15 PP2 KWP2 ETRIG2 PWM2 — V
DDX
PERP/PPSP Disabled
16 PP3 KWP3 ETRIG3 PWM3 — V
DDX
PERP/PPSP Disabled
17 PP4 KWP4 PWM4 — — V
DDX
PERP/PPSP Disabled
18 PP5 KWP5 PWM5 — — V
DDX
PERP/PPSP Disabled
19 PT5 IOC5 — — — V
DDX
PERT/PPST Disabled
20 PT4 IOC4 — — — V
DDX
PERT/PPST Disabled
21 PT3 IOC3 — — — V
DDX
PERT/PPST Disabled
22 PT2 IOC2 — — — V
DDX
PERT/PPST Disabled
23 PT1 IOC1
IRQ — — V
DDX
PERT/PPST Disabled
24 PT0 IOC0
XIRQ — — V
DDX
PERT/PPST Disabled
25 PAD0 KWAD0 AN0 — — V
DDA
PER1AD/PPS1AD Disabled
26 PAD8 KWAD8 — — — V
DDA
PER0AD/PPS0AD Disabled
27 PAD1 KWAD1 AN1 — — V
DDA
PER1AD/PPS1AD Disabled