Datasheet

Serial Communication Interface (S12SCIV5)
MC9S12G Family Reference Manual, Rev.1.23
694 Freescale Semiconductor
Figure 20-22. Start Bit Search Example 1
In Figure 20-23, verification sample at RT3 is high. The RT3 sample sets the noise flag. Although the
perceived bit time is misaligned, the data samples RT8, RT9, and RT10 are within the bit time and data
recovery is successful.
Figure 20-23. Start Bit Search Example 2
In Figure 20-24, a large burst of noise is perceived as the beginning of a start bit, although the test sample
at RT5 is high. The RT5 sample sets the noise flag. Although this is a worst-case misalignment of perceived
bit time, the data samples RT8, RT9, and RT10 are within the bit time and data recovery is successful.
Reset RT Clock
RT1 RT1 RT1 RT1 RT2 RT3 RT4 RT5 RT1 RT1 RT2 RT3 RT4 RT7 RT6 RT5
RT10
RT9 RT8
RT14 RT13 RT12 RT11 RT15 RT16
RT1 RT2 RT3
Samples
RT Clock
RT Clock Count
Start Bit
RXD
110111100000
LSB
0 0
Reset RT Clock
RT1 RT1 RT1 RT1 RT1 RT1 RT2 RT3 RT4 RT5 RT6 RT7 RT8
RT11 RT10
RT9
RT14 RT13 RT12
RT2 RT1
RT16 RT15
RT3 RT4 RT5 RT6 RT7
Samples
RT Clock
RT Clock Count
Actual Start Bit
RXD
1111110000
LSB
00
Perceived Start Bit