Datasheet

Serial Communication Interface (S12SCIV5)
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor 695
Figure 20-24. Start Bit Search Example 3
Figure 20-25 shows the effect of noise early in the start bit time. Although this noise does not affect proper
synchronization with the start bit time, it does set the noise flag.
Figure 20-25. Start Bit Search Example 4
Figure 20-26 shows a burst of noise near the beginning of the start bit that resets the RT clock. The sample
after the reset is low but is not preceded by three high samples that would qualify as a falling edge.
Depending on the timing of the start bit search and on the data, the frame may be missed entirely or it may
set the framing error flag.
Reset RT Clock
RT1 RT1 RT1 RT1 RT2 RT3 RT4 RT5 RT6 RT7 RT8 RT9
RT10 RT13 RT12 RT11 RT16 RT15 RT14
RT4 RT3 RT2 RT1 RT5 RT6 RT7 RT8 RT9
Samples
RT Clock
RT Clock Count
Actual Start Bit
RXD
101110000
LSB
0
Perceived Start Bit
Reset RT Clock
RT1 RT1 RT1 RT1 RT1 RT1 RT1 RT1 RT1 RT1 RT2 RT3 RT4 RT7 RT6 RT5
RT10
RT9 RT8
RT14 RT13 RT12 RT11 RT15 RT16
RT1 RT2 RT3
Samples
RT Clock
RT Clock Count
Perceived and Actual Start Bit
RXD
11111001
LSB
11 1 1