INTEGRATED CIRCUITS SC28C94 Quad universal asynchronous receiver/transmitter (QUART) Product data sheet Supersedes data of 1998 Aug 19 2006 Aug 09
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) SC28C94 • Baud rate for the receiver and transmitter selectable from: DESCRIPTION The 28C94 quad universal asynchronous receiver/transmitter (QUART) combines four enhanced Philips Semiconductors industry-standard UARTs with an innovative interrupt scheme that can vastly minimize host processor overhead.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) SC28C94 PIN CONFIGURATIONS VCC V SS WRN A0 A1 4 3 2 1 52 51 50 49 A4 CEN 5 A3 RDN 6 A2 IACKN 7 DACKN TXDB 52-Pin PLCC Package 48 47 RXDB 8 46 A5 D7 9 45 IRQN 44 RXDD D6 10 D5 11 43 TXDD D4 12 42 X1/CLK D3 13 41 X2 40 VSS VSS 14 39 I/O3D D2 15 38 RESET I/O3B 16 37 TXDC D1 17 36 RXDC D0 18 27 28 29 V SS I/O0C 30 31 32 33 I/O0D 26 I/O3C 25 I/O2C 24
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) SC28C94 BLOCK DIAGRAM INTERNAL DATA BUS 8 DUART AB 8 BUS BUFFER D0–D7 CHANNEL A 8 BYTE TRANSMIT FIFO TIMING TxDA CONTROL WRN A0–A5 8 BYTE RECEIVE FIFO OPERATION CONTROL RDN CEN TRANSMIT SHIFT REGISTER ADDRESS DECODE RxDA RECEIVE SHIFT REGISTER 6 R/W CONTROL RESET MR 0, 1, 2 CR DACKN SR CSR Rx CSR Tx ÷2 TIMING CRYSTAL OSCILLATOR X1/CLK POWER UP-DOWN LOGIC X2 TxDB CHANNEL B (AS ABOV
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) SC28C94 PIN DESCRIPTION MNEMONIC CEN TYPE NAME AND FUNCTION I Chip Select: Active low input that, in conjunction with RDN or WRN, indicates that the host MPU is trying to access a QUART register. CEN must be inactive when IACKN is asserted. A5:0 I Address Lines: These inputs select a 28C94 register to be read or written by the host MPU. D7:0 I/O RDN I Read Strobe: Active low input.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) Table 1.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) Oscillator The crystal oscillator operates directly from a 3.6864MHz crystal connected across the X1/CLK and X2 inputs with a minimum of external components. If an external clock of the appropriate frequency is available, it may be connected to X1/CLK. If an external clock is used instead of a crystal, X1 must be driven and X2 left floating as shown in Figure 14.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) The counter timer is controlled with six commands: Start/Stop C/T, Read/Write Counter/Timer lower register and Read/Write Counter/Timer upper register. These commands have slight differences depending on the mode of operation. Please see the detail of the commands under the CTLR CTUR Register descriptions. set each time the counter/timer transitions from 1 to 0.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) SC28C94 or break condition, and presents the assembled character to the CPU via the receiver FIFO. receiver FIFO. If the line remains low for a full character time plus a stop bit then a break will be detected. The receiver operates in two modes: the 1X and 16X. The 16X mode is the more robust of the two.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) SC28C94 WAKE-UP MODE (MULTI-DROP OR 9-BIT) INPUT OUTPUT (I/O) PINS In addition to the normal transmitter and receiver operation described above, the QUART incorporates a special mode which provides automatic “wake up” of a receiver through address frame (or character) recognition for multi-processor or multi-station communications. This mode is selected by programming MR1[4:3] to ‘11’.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) default priority among the non-receive/transmit types when the programmable fields are all zeros. Functional Description of the Interrupt Arbitration For the purpose of this description, a ‘source’ is any one of the 18 QUART circuits that may generate an interrupt. The QUART contains eighteen sources which may cause an interrupt: 1. Four receiver data FIFO filled functions. 2.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) ones. When one or more of the 18 interrupt sources which are enabled via the IMR (Interrupt Mask Register) exceed the threshold then the interrupt threshold is effectively disconnected from the bidding operation while the 18 sources now bid against each other. The final result is that the highest bidding source will disable all others and its value will be loaded to the CIR and the IRQN pin asserted low.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) SC28C94 A code of 11 in the Interrupt Vector Control Field of the ICR results in NO interrupt vector being generated. The external data bus is driven to a high impedance throughout the IACK cycle. A DACKN will be generated normally for the IACK cycle, however.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) Table 4. Bit 7 SC28C94 Register Bit Formats, Duart ab. [duplicated for Duart cd] (continued) Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 SR (Status Register) Rec’d.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) the error occurs after the leading bytes have been received. In the character mode the error bits are presented to the status register when the corresponding byte is at the top of the FIFO. Mode Registers 0, 1 and 2 The addressing of the Mode Registers is controlled by the MR Register pointer. On any access to the Mode Registers this pointer is always incremented.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) The user must exercise care when switching into and out of the various modes. The selected mode will be activated immediately upon mode selection, even if this occurs in the middle of a received or transmitted character. Likewise, if a mode is deselected, the device will switch out of the mode immediately.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) 1001 1010 1011 1100 1101 111x SC28C94 CSR – Clock Select Register Negate RTSN. Causes the RTSN output to be negated (High). Set Timeout Mode On. The register in this channel will restart the C/T as each receive character is transferred from the shift register to the RxFIFO.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) register because the FIFO is full, FFULL is not reset after reading the FIFO once. SR – Channel Status Register SR[7] – Received Break This bit indicates that an all zero character of the programmed length has been received without a stop bit.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) reduced to a level less than that programmed in MR0[5:4] or the transmitter is disabled or reset. IPCR – Input Port Change Register IPCR[7:4] – I/O1b, I/O0b, I/O1a, I/O0a Change-of-State Detectors These bits are set when a change of state, as defined in the Input Port section of this data sheet, occurs at the respective pins. They are cleared when the IPCR is read by the CPU.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) In the counter mode, the C/T counts down the number of pulses loaded in CTUR and CTLR by the CPU. Counting begins upon receipt of a start counter command. Upon reaching the terminal count H‘0000’, the counter ready interrupt bit (ISR[3]) is set. The counter rolls over to 65535 and continues counting until stopped by the CPU.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) SC28C94 Table 8. Register Bit Formats, I/O Section Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 IPCR (Input Port Change Register ab) The lower four bits replicate the lower four bits of the IPR. The upper four bits reads change of state detectors. Change detectors are enabled in ACR[3:0].
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) SC28C94 I/O Port Control Channel B (IOPCRB) IOPCR[xx] Pin Control Bits IOPCRb[7:6] IOPCRb[5:4] IOPCRb[3:2] IOPCRb[1:0] I/O3B I/O2B I/O1B I/O0B 00 = input IPR(7), TxC in IPR(6), RxC in IPR(3), TxC in IPR(2), CTSN 01 = output OPRab(7) OPRab(6) RTSN1 if IOPCR[5:4] = 01 OPRab(3) RTSN2 if IOPCR[5:4] ≠ 01 OPRab(2) 10 = output TxC 16x RxC 1x C/T ab out TxC 1x 11 = output TxC 1x RxC 16x
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) SC28C94 Global Interrupting Channel (GICR) Registers of the Interrupt System The CIR, and “Global” registers are updated with the IACKN signal or from the “Update CIR” command at hex address 2A. These registers are not updated when IRQN is asserted since there could be a long time between the assertion of IRQN and the start of the interrupt service routine. (See notes following this section).
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) SC28C94 DC ELECTRICAL CHARACTERISTICS VCC = 5V ± 10%, TA = –40_C to 85_C, unless otherwise specified.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) SC28C94 AC ELECTRICAL CHARACTERISTICS1, 2, 3, 4 VCC = 5V ± 10%, TA = –40_C to 85_C, unless otherwise specified.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) SC28C94 AC ELECTRICAL CHARACTERISTICS1 VCC = 5 V ± 10 %, TA = –40 _C to 85 _C, unless otherwise specified. LIMITS NO NO.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) SC28C94 AC ELECTRICAL CHARACTERISTICS4 VCC = 5V ± 10%, TA = –40 _C to +85 _C, unless otherwise specified. NO NO.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) SC28C94 AC ELECTRICAL CHARACTERISTICS VCC = 5 V ± 10 %, TA = –40 _C to +85 _C, unless otherwise specified. NO NO.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) SC28C94 INTBUSN7:0 HOLD EN INVERTING LATCHES BYTE COUNTER TRANSMITTER OFFSET CORRECTION LOGIC IACK UPDCIR BYTE COUNT • • INTERRUPT TYPE CURRENT INTERRUPT REGISTER CHANNEL • READ GIBC READ CIR READ CICR • D7 D6 D5 D4 D3 D2 • D1 • D0 SD00167 Figure 8. Current Interrupt Register Logic 2.7K INTRAN–INTRDN, I/O0a–I/O3d +5V 60pF +5V 1.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) SC28C94 RESET tRES SD00169 Figure 10. Reset Timing RDN tPS tPH I/O as Input I/O PINS MUST BE STABLE FOR NON-CHANGING BUS DATA DURING THE READ. CEN tPD WRN tPD I/O as Output OLD DATA NEW DATA NOTE: I/O PIN DATA IS NOT LATCHED SD00170 Figure 11. I/O Port Timing WRN INTERRUPT 1 OUTPUT VM tIR VOL +0.5V VOL RDN INTERRUPT 1 OUTPUT tIR VOL +0.5V VOL NOTES: 1.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) tCLK tCTC tRx tTx SC28C94 +5V 1K required for TTL gate. X1/CLK CTCLK RxC TxC X1 tCLK tCTC tRx tTx X2 NC C1 = C2 = 24pF FOR CL = 20PF POWER DOWN C1 and C2 should be chosen according to the crystal manufacturer’s specification. C1 and C2 values will include any parasitic capacitance of the wiring. X1 22 BRG 3pF C1 50 KOHMs TO 150 KOHMs 26C94 C2 STANDARD BAUD RATES 38.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) SC28C94 RxC (1X INPUT) tRXS tRXH RxD SD00174 Figure 15. Receive Clock Timing TxD D1 D2 D2 D3 D3 BREAK D4 D6 TRANSMITTER ENABLED TxRDY (SR2) MR0(5:4) = 00 WRN D1 START BREAK D4 STOP BREAK D5 WILL NOT BE TRANSMITTED D6 CTSN1 (I/O0) RTSN2 (I/O1) CR[7:4] = 1010 CR[7:4] = 1010 NOTES: 1. TIMING SHOWN FOR MR2[4] = 1. 2. TIMING SHOWN FOR MR2[5] = 1. SD00175 Figure 16.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) RxD D1 D2 D3 D9 D10 SC28C94 D11 D12 D13 RECEIVER ENABLED RxRDY (SR0) D2 FFULL (SR1) RxRDY/ FFULL ISR(1) RDN S S = STATUS D = DATA D OVERRUN (SR4) S D S D S D D2 D3 D10 D10 WILL BE LOST D1 RESET BY COMMAND D10 WILL BE OVERWRITTEN BY D11, 12, ETC RTS1 I/O1 I/O1 = 1 or (CR[7:4] = 1010) NOTES; 1. TIMING SHOWN FOR MR1[7] = 1. 2.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) the interrupt is generated. It is the source’s value which is captured in the CIR. INTERRUPT NOTES The following is a brief description of the new QUART “Bidding” interrupt system, interrupt vector and the use of the Global registers.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) See the “Interrupt Note on 28C94” which refers to the use of the MR registers in controlling the Rx and Tx bidding. through the most significant 6 bits. The result of this is that the channel value does not ’bid’. However the logic is such that other parts of the bid being equal the condition of the highest channel will be captured in CIR. The increasing order of the channels is A, B, C, D.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) When IACKN is not used or is not available the command at 2Ah should be used to update the CIR (Current Interrupt Register). This register is normally updated by IACKN in response to the IRQN. Note that the CIR is not updated by IRQN since there could be a long time between the assertion of IRQN and the start of the interrupt service routine.
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) PLCC52: plastic leaded chip carrier; 52 leads 2006 Aug 09 SC28C94 SOT238-2 37
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) SC28C94 REVISION HISTORY Rev Date Description _3 20060809 Product data sheet (9397 750 14943). Supersedes data of 1998 Aug 19 (9397 750 04353).
Philips Semiconductors Product data sheet Quad universal asynchronous receiver/transmitter (QUART) SC28C94 Legal Information Data sheet status Document status [1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
