INTEGRATED CIRCUITS SCC2698B Enhanced octal universal asynchronous receiver/transmitter (Octal UART) Product data sheet Supersedes data of 2000 Jan 31 2006 Aug 07
Philips Semiconductors Product data sheet Enhanced octal universal asynchronous receiver/transmitter (Octal UART) DESCRIPTION SCC2698B FEATURES • Eight full-duplex independent asynchronous receiver/transmitters • Quadruple buffered receiver data register • Programmable data format: The SCC2698B Enhanced Octal Universal Asynchronous Receiver/Transmitter (Octal UART) is a single chip MOS-LSI communications device that provides eight full-duplex asynchronous receiver/transmitter channels in a single pack
Philips Semiconductors Product data sheet Enhanced octal universal asynchronous receiver/transmitter (Octal UART) SCC2698B PIN CONFIGURATIONS VCC 1 64 RxDa 2 63 TxDa X1/CLK 3 62 RxDc X2 4 61 TxDc D1 5 60 RxDe D2 6 59 MP10h NC 7 58 MP10g D3 8 57 RxDg NC 9 56 TxDe D0 D4 10 55 TxDg NC 11 54 MPOa D5 12 53 MPOc RESET 13 52 MPOe D6 14 51 MPOg D7 15 50 GND CEN 16 49 MP10f WRN 17 48 MP10e GND 18 47 RxDh RDN 19 45 RxDf A0 20 45 RxDd A1 21 44 RxDb A2 22 43 TxDh A
Philips Semiconductors Product data sheet Enhanced octal universal asynchronous receiver/transmitter (Octal UART) SCC2698B BLOCK DIAGRAM INTERNAL DATA BUS BLOCK A 8 BUS BUFFER D0–D7 CHANNEL A TRANSMIT HOLD REGISTER TIMING TxDA CONTROL WRN A0–A5 RECEIVE HOLD REGISTER (3) OPERATION CONTROL RDN CEN TRANSMIT SHIFT REGISTER ADDRESS DECODE RxDA RECEIVE SHIFT REGISTER 6 R/W CONTROL RESET MR1, 2 CR SR CSR Rx CSR Tx TIMING X1/CLK X2 CRYSTAL OSCILLATOR TxDb CHANNEL B (AS ABOVE) POWER-ON LOG
Philips Semiconductors Product data sheet Enhanced octal universal asynchronous receiver/transmitter (Octal UART) SCC2698B PIN DESCRIPTION PIN NO. MNEMONIC TYPE NAME AND FUNCTION I/O Data Bus: Active–High 8-bit bidirectional 3-State data bus. Bit 0 is the LSB and bit 7 is the MSB. All data, command, and status transfers between the CPU and the Octal UART take place over this bus. The direction of the transfer is controlled by the WRN and RDN inputs when the CEN input is low.
Philips Semiconductors Product data sheet Enhanced octal universal asynchronous receiver/transmitter (Octal UART) SCC2698B PIN DESCRIPTION (Continued) PIN NO. TYPE MPI1a–MPI1h 14, 21, 38, 40, 60, 62, 78, 80 I Multi-Purpose Input 1: This pin (one for each UART) is programmable. Its state can always be determined by reading the IPCR bit 1 or IPR bit 1. C/TCLK – This input will serve as the external clock for the counter/timer when ACR[5] is set to 0.
Philips Semiconductors Product data sheet Enhanced octal universal asynchronous receiver/transmitter (Octal UART) SCC2698B clock is used instead of a crystal, X1 must be driven and X2 left floating as shown in Figure 9. The clock serves as the basic timing reference for the baud rate generator (BRG), the counter/timer, and Table 1. other internal circuits. A clock frequency, within the limits specified in the electrical specifications, must be supplied even if the internal BRG is not used.
Philips Semiconductors Product data sheet Enhanced octal universal asynchronous receiver/transmitter (Octal UART) Transmitter The SCC2698 is conditioned to transmit data when the transmitter is enabled through the command register. The SCC2698 indicates to the CPU that it is ready to accept a character by setting the TxRDY bit in the status register. This condition can be programmed to generate an interrupt request at MPO or MPP1 and INTRN.
Philips Semiconductors Product data sheet Enhanced octal universal asynchronous receiver/transmitter (Octal UART) SCC2698B The framing, parity and received break status bits are reset when the associated data byte is read from the RxFIFO since these “error” conditions are attached to the byte that has the error the bit time clock (1X clock mode). If RxD is sampled high, the start bit is invalid and the search for a valid start bit begins again. If RxD is still low, a valid start bit is assumed.
Philips Semiconductors Product data sheet Enhanced octal universal asynchronous receiver/transmitter (Octal UART) SCC2698B Note: The transmitter may also control the “RTSN” pin. When under transmitter control the meaning is completely changed. The meaning is the transmission has ended. This signal is usually used to switch (turnaround) a bi–directional driver from transmit to receive. the receiver, thereby withdrawing its interrupt.
Philips Semiconductors Product data sheet Enhanced octal universal asynchronous receiver/transmitter (Octal UART) SCC2698B be sure the TxRDY bit is active immediately before issuing the transmitter disable instruction. (TxEMT is always set if the transmitter has underrun or has just been enabled), TxRDY sets at the end of the “start bit” time. It is during the start bit that the data in the transmit holding register is transferred to the transmit shift register.
Philips Semiconductors Product data sheet Enhanced octal universal asynchronous receiver/transmitter (Octal UART) MR2[7:6] – Mode Select The Octal UART can operate in one of four modes. MR2[7:6] = 00 is the normal mode, with the transmitter and receiver operating independently. MR2[7:6] = 01 places the channel in the automatic echo mode, which automatically re-transmits the received data. The following conditions are true while in automatic echo mode: 1.
Philips Semiconductors Product data sheet Enhanced octal universal asynchronous receiver/transmitter (Octal UART) SCC2698B Table 2.
Philips Semiconductors Product data sheet Enhanced octal universal asynchronous receiver/transmitter (Octal UART) SCC2698B Table 2.
Philips Semiconductors Product data sheet Enhanced octal universal asynchronous receiver/transmitter (Octal UART) MR2[5] – Transmitter Request-to-Send Control CAUTION: When the transmitter controls the OP pin (usually used for the RTSN signal) the meaning of the pin is not RTSN at all! Rather, it signals that the transmitter has finished the transmission (i.e., end of block). SCC2698B CSR – Clock Select Register Table 3. Baud Rate This bit allows deactivation of the RTSN output by the transmitter.
Philips Semiconductors Product data sheet Enhanced octal universal asynchronous receiver/transmitter (Octal UART) 0101 0110 0111 1000 1001 1010 1011 1100 1101 111x external 1x clock. This will usually require a high time of one X1 clock period or 3 X1 edges since the clock of the controller is not synchronous to the X1 clock. Reset break change interrupt. Causes the break detect change bit in the interrupt status register (ISR[2 or 6]) to be cleared to zero. Start break.
Philips Semiconductors Product data sheet Enhanced octal universal asynchronous receiver/transmitter (Octal UART) The selected set of rates is available for use by the receiver and transmitter. OPCR – Output Port Configuration Register OPCR[7] – MPP Function Select When this bit is a zero, the MPP pins function as inputs, to be used as general purpose inputs or as receiver or transmitter external clock inputs. When this bit is set, the MPP pins function as outputs.
Philips Semiconductors Product data sheet Enhanced octal universal asynchronous receiver/transmitter (Octal UART) ISR[7] – MPI Change-of-State This bit is set when a change-of-state occurs at the MPI1b, MPI0b, MPI1a, MPI0a input pins. It is reset when the CPU reads the IPCR. bit in the IMR is a ‘1’, the INTRN output is asserted (Low). If the corresponding bit in the IMR is a zero, the state of the bit in the ISR has no effect on the INTRN output. Note that the IMR does not mask reading of the ISR.
Philips Semiconductors Product data sheet Enhanced octal universal asynchronous receiver/transmitter (Octal UART) SCC2698B DC ELECTRICAL CHARACTERISTICS1, 2, 3 TA = 0 to +70_, VCC = 5.
Philips Semiconductors Product data sheet Enhanced octal universal asynchronous receiver/transmitter (Octal UART) AC Electrical characteristics1, 2, 3, 4 SYMBOL SCC2698B TA = 0 to +70_, VCC = 5.
Philips Semiconductors Product data sheet Enhanced octal universal asynchronous receiver/transmitter (Octal UART) SCC2698B 2.7K INTRAN–INTRDN, MPP1a–MPP1h, MPP2a–MPP2h +5V 60pF +5V 1.6K D0–D7, TxDa–TxDh, MPOa–MPOh 6K 150pF SD00187 Figure 4. Test Conditions on Outputs RESET tRES SD00169 Figure 5. Reset Timing A0–A5 tAS tAH CEN tCS tCH tRWD tRW RDN tDD D0–D7 (READ) FLOAT tDF NOT VALID VALID FLOAT tRWD WRN tDS D0–D7 (WRITE) tDH VALID SD00188 Figure 6.
Philips Semiconductors Product data sheet Enhanced octal universal asynchronous receiver/transmitter (Octal UART) SCC2698B RDN tPS tPH MPIx OR MPPx WRN tPD RDN tPD MPOx OLD DATA NEW DATA SD00189 Figure 7. Port Timing VM WRN tIR VOL +0.5V INTERRUPT 1 OUTPUT VOL RDN INTERRUPT 1 OUTPUT tIR VOL +0.5V VOL NOTES: 1. INCLUDES MPP WHEN USED AS TxRDY or RxDY/FFULL OUTPUTS AS WELL AS INTRN. 2. THE TEST FOR OPEN DRAIN OUTPUTS IS INTENDED TO GUARANTEE SWITCHING OF THE OUTPUT TRANSISTOR.
Philips Semiconductors Product data sheet Enhanced octal universal asynchronous receiver/transmitter (Octal UART) SCC2698B tCLK tCTC tRx tTx +5V R1 1K X1/CLK CTCLK RxC TxC X1 U1 RESISTOR REQUIRED WHEN U1 IS A TTL DEVICE tCLK tCTC tRx tTx X2 NC SCC2698B C1 = C2 = 24pF FOR CL = 20PF X1 3pF 50 TO 150 KΩ X2 TO INTERNAL CLOCK DRIVERS 3.6864MHz 4pF NOTE: C1 AND C2 SHOULD BE BASED ON MANUFACTURER’S SPECIFICATION. PARASITIC CAPACITANCE SHOULD BE INCLUDED WITH C1 AND C2.
Philips Semiconductors Product data sheet Enhanced octal universal asynchronous receiver/transmitter (Octal UART) SCC2698B RxC (1X INPUT) tRXS tRXH RxD SD00192 Figure 11. Receive Timing TxD D1 D2 D2 D3 D3 BREAK D4 D6 TRANSMITTER ENABLED TxRDY (SR2) WRN D1 START BREAK D4 STOP BREAK D5 WILL NOT BE TRANSMITTED D6 CTSN1 (MPI) RTSN2 (MPO) CR[7:4] = 1010 CR[7:4] = 1010 NOTES: 1. TIMING SHOWN FOR MR2[4] = 1. 2. TIMING SHOWN FOR MR2[5] = 1. SD00128 Figure 12.
Philips Semiconductors Product data sheet Enhanced octal universal asynchronous receiver/transmitter (Octal UART) RxD D1 D2 D3 SCC2698B D4 D5 D6 D7 D8 RECEIVER ENABLED RxRDY (SR0) D2 FFULL (SR1) RxRDY/ FFULL MPO2 RDN S S = STATUS D = DATA D S D5 WILL BE LOST D1 OVERRRUN (SR4) D D2 S S D D3 D D4 RESET BY COMMAND RTS1 MPO MPO = 1 (CR[7:4] = 1010) NOTES; 1. Timing shown for MR1[7]. 2. Shown for ACR[2:] = 111 and MR1[6] = 0. SD00129 Figure 13.
Philips Semiconductors Product data sheet Enhanced octal universal asynchronous receiver/transmitter (Octal UART) SCC2698B Table 5. Baud Rates Extended Normal BRG CSR[7:4] 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 ACR[7] = 0 50 110 134.5 200 300 600 1,200 1,050 2,400 4,800 7,200 9,600 38.4K Timer I/O2 – 16X I/O2 – 1X BRG Test ACR[7] = 1 75 110 38.4K 150 300 600 1,200 2,000 2,400 4,800 1,800 9,600 19.2K Timer I/O2 – 16X I/O2 – 1X ACR[7] = 0 4,800 880 1,076 19.
Philips Semiconductors Product data sheet Enhanced octal universal asynchronous receiver/transmitter (Octal UART) PLCC84: plastic leaded chip carrier; 84 leads 2006 Aug 07 SCC2698B SOT189-2 27
Philips Semiconductors Product data sheet Enhanced octal universal asynchronous receiver/transmitter (Octal UART) SCC2698B REVISION HISTORY Rev Date Description _4 20060807 Product data sheet (9397 750 14949). Supersedes data of 2000 Jan 31. Modifications: • Ordering information: changed Version for PLCC68 from SOT189–3 to SOT189–2 • Changed package outline drawing from SOT189–3 to SOT189–2. _3 20000131 _2 19980904 2006 Aug 07 Product specification (9397 750 06828). ECN 853-1127 23062.
Philips Semiconductors Product data sheet Enhanced octal universal asynchronous receiver/transmitter (Octal UART) SCC2698B Legal Information Data sheet status Document status [1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
