Datasheet

MPC5674F Microcontroller Data Sheet, Rev. 9
Freescale Semiconductor 117
213 WKPCFG_NMI_
GPIO213
P
WKPCFG Weak pull configuration input I MH V
DDEH1
WKPCFG/Up Input/Up — N3 M5
A1
NMI Critical interrupt to core
11
I
A2
—— —
G
GPIO213 GPIO I
208 PLLCFG0_IRQ4_
GPIO208
P
PLLCFG0 FMPLL mode configuration input I MH V
DDEH1
PLLCFG/Up Input/Up M3 R3 M3
A1
IRQ4 External interrupt request I
A2
—— —
G
GPIO208 GPIO I/O
209 PLLCFG1_IRQ5_
GPIO209
P
PLLCFG1 FMPLL mode configuration input I MH V
DDEH1
PLLCFG/Up Input/Up
(for Rev2 of the
device: —/Up)
L2 P2 L1
A1
IRQ5 External interrupt request I
A2
SOUTD DSPI D data output O
G
GPIO209 GPIO I/O
— PLLCFG2
P
PLLCFG2 FMPLL mode configuration input I MH V
DDEH1
PLLCFG/
Down
PLLCFG/
Down
L3 P3 L2
—XTAL
P
XTAL Crystal oscillator output O AE V
DD33
XTAL XTAL W22 AC26 AC26
—EXTAL
P
EXTAL Crystal oscillator input I AE V
DD33
EXTAL EXTAL V22 AB26 AB26
229 D_CLKOUT
P
D_CLKOUT EBI system clock output O F V
DDE9
CLKOUT/
Enabled
CLKOUT/
Enabled
——AF12
214 ENGCLK
P
ENGCLK EBI engineering clock output
Note: EXTCLK (External clock input)
selected through SIU register)
OF V
DDE2
ENGCLK/
Enabled
ENGCLK/
Enabled
AA1 AD1 AD1
JTAG and Nexus
(see footnote
12
about resets)
—EVTI
–
13
EVTI Nexus event in I F V
DDE2
—/Up EVTI/Up N4 T4 V1
227 EVTO
(the BAM uses this pin to
select if auto baud rate is on or
off)
–
13
EVTO Nexus event out O F V
DDE2
ABS/Up EVTO/HI P1 U1 V2
219 MCKO
–
13
MCKO Nexus message clock out O F V
DDE2
O/Low Disabled
14
N2 T2 U4
Table 42. Signal Properties and Muxing Summary (continued)
GPIO/PCR
1
Signal Name
2
P/A/G
3
Function
4
Function Summary
Direction
Pad Type
5
Voltage
6
State during
RESET
7
State
after RESET
8
Package Location
324 416 516