Datasheet

MPC5674F Microcontroller Data Sheet, Rev. 9
Freescale Semiconductor 120
231 MDO12_GPIO231
–
13
MDO12
15
Nexus message data out O F V
DDE2
O/Low —/Down V1 AA1 Y5
A1
—— —
A2
—— —
G
GPIO231 GPIO I/O
232 MDO13_GPIO232
–
13
MDO13
15
Nexus message data out O F V
DDE2
O/Low —/Down W2 AA2 AA1
A1
—— —
A2
—— —
G
GPIO232 GPIO I/O
233 MDO14_GPIO233
–
13
MDO14
15
Nexus message data out O F V
DDE2
O/Low —/Down V3 AA3 AA2
A1
—— —
A2
—— —
G
GPIO233 GPIO I/O
234 MDO15_GPIO234
–
13
MDO15
15
Nexus message data out O F V
DDE2
O/Low —/Down U4 Y4 AA3
A1
—— —
A2
—— —
G
GPIO234 GPIO I/O
224 MSEO0
–
13
MSEO0
15
Nexus message start/end out O F V
DDE2
O/Low MSEO/HI P2 U2 U6
225 MSEO1
–
13
MSEO1
15
Nexus message start/end out O F V
DDE2
O/Low MSEO/HI N3T3U5
226 RDY
–
13
RDY Nexus ready output O F V
DDE2
O/Low RDY/HI M4 R4 U3
—TCK
–
13
TCK JTAG test clock input I F V
DDE2
TCK/Down TCK/Down Y1 AB2 AB2
—TDI
–
13
TDI JTAG test data input I F V
DDE2
TDI/Up TDI/Up Y2 AC2 AC2
228 TDO
–
13
TDO JTAG test data output O F V
DDE2
TDO/Up TDO/Up W1 AB1 AB1
—TMS
–
13
TMS JTAG test mode select input I F V
DDE2
TMS/Up TMS/Up W3 AB3 AB3
—JCOMP
–
13
JCOMP JTAG TAP controller enable I F V
DDE2
JCOMP/Down JCOMP/Down M1 R1 U2
— TEST
—
TEST Test mode select (not for customer
use)
IFV
DDEH1
TEST/Down TEST/Down B4 B4 B4
— VDDSYN
—
VDDSYN Clock synthesizer power input I VDDE V
DDSYN
VDDSYN VDDSYN Y22 AD26 AD26
Table 42. Signal Properties and Muxing Summary (continued)
GPIO/PCR
1
Signal Name
2
P/A/G
3
Function
4
Function Summary
Direction
Pad Type
5
Voltage
6
State during
RESET
7
State
after RESET
8
Package Location
324 416 516