Datasheet

Electrical Characteristics
MPC5674F Microcontroller Data Sheet, Rev. 9
Freescale Semiconductor 45
Figure 17. Pad Output Delay
4.12 AC Timing
4.12.1 Generic Timing Diagrams
The generic timing diagrams in Figure 18 and Figure 19 apply to all I/O pins with pad types F and MH. See Appendix A, Signal
Properties and Muxing, for the pad type for each pin.
Table 31. Derated Pad AC Specifications (V
DDEH
=3.3V)
1
1
These are worst case values that are estimated from simulation and not tested. The values in the table are simulated at
V
DD
= 1.08 V to 1.32 V, V
DDE
= 3.0 V to 3.6 V, V
DDEH
= 3.0 V to 3.6 V, V
DD33
and V
DDSYN
= 3.0 V to 3.6 V, T
A
=T
L
to T
H
.
Spec Pad SRC/DSC
Out Delay
2,3
L  H/H  L (ns)
2
This parameter is supplied for reference and is not guaranteed by design and not tested.
3
Delay and rise/fall are measured to 20% or 80% of the respective signal.
Rise/Fall
4,3
(ns)
4
This parameter is guaranteed by characterization before qualification rather than 100% tested.
Load Drive
(pF)
1 Medium
5
5
Out delay is shown in Figure 17. Add a maximum of one system clock to the output delay for delay with respect to system clock.
00 200/210 86/86 50
2 270/285 120/120 200
3 01 37/45 15.5/19 50
4 69/82 38/43 200
5 11 18/17 7.6/8.5 50
6 46/49 30/34 200
V
DDEn
/ 2
V
OH
V
OL
Rising
Edge
Output
Delay
Falling
Edge
Output
Delay
Pad
Data Input
Pad
Output
V
DDEHn
/ 2