Datasheet

Electrical Characteristics
MPC5674F Microcontroller Data Sheet, Rev. 9
Freescale Semiconductor 57
4.12.6 External Interrupt Timing (IRQ Pin)
Figure 31. External Interrupt Timing
4.12.7 eTPU Timing
Table 36. External Interrupt Timing
1
1
IRQ timing specified at V
DD
= 1.08 V to 1.32 V, V
DDEH
= 3.0 V to 5.5 V, V
DD33
and V
DDSYN
= 3.0 V to 3.6 V, T
A
=T
L
to T
H
.
Spec Characteristic Symbol Min Max Unit
1 IRQ Pulse Width Low t
IPWL
3—t
cyc
2
2
See Notes on t
cyc
on Figure 16 and Table 27 in Section 4.11.1, Clocking.
2 IRQ Pulse Width High t
IPWH
3—t
cyc
2
3 IRQ Edge to Edge Time
3
3
Applies when IRQ pins are configured for rising edge or falling edge events, but not both.
t
ICYC
6—t
cyc
2
Table 37. eTPU Timing
1
1
eTPU timing specified at V
DD
= 1.08 V to 1.32 V, V
DDEH
= 3.0 V to 5.5 V, V
DD33
and V
DDSYN
= 3.0 V to 3.6 V, T
A
=T
L
to T
H
,
and C
L
= 200 pF with SRC = 0b00.
Spec Characteristic Symbol Min Max Unit
1 eTPU Input Channel Pulse Width t
ICPW
4—t
cyc
2
2
See Notes on t
cyc
on Figure 16 and Table 27 in Section 4.11.1, Clocking.
2 eTPU Output Channel Pulse Width t
OCPW
1
3
3
This specification does not include the rise and fall times. When calculating the minimum eTPU pulse width, include the rise
and fall times defined in the slew rate control fields (SRC) of the pad configuration registers (PCR).
—t
cyc
2
IRQ
1
2
3