Information

Note 3: When using an odd prescaler (ADCx_CLK_ODD = 1), the duty cycle setting
(ADCxCLK_DTY) must be kept at the default setting of 0.
e5086: eQADC: unexpected result may be pushed when Immediate Conversion
Command is enabled
Errata type: Errata
Description: In the enhanced Queued Analog to Digital Converter (eQADC), when the Immediate
Conversion Command is enabled (ICEAn=1) in the eQADC_MCR (Module Configuration
Register), if a conversion from Command First-In-First Out (CFIFO0, conv0) is requested
concurrently with the end-of-conversion from another, lower priority conversion (convx), the
result of the convx may be lost or duplicated causing an unexpected number of results in the
FIFO (too few or too many).
Workaround: Workaround 1: Do not use the abort feature (ICEAn=0).
Workaround 2: Arrange the timing of the CFIFO0 trigger such that it does not assert the trigger
at the end of another, lower priority conversion.
Workaround 3: Detect the extra or missing conversion result by checking the
EQADC_CFTCRx (EQADC CFIFO Transfer Counter Register x). This register records how
many commands were issued, so it can be used to check that the expected number of results
have been received.
e2386: eSCI : No LIN frame reception after leaving stop mode
Errata type: Errata
Description: When the eSCI module is in LIN mode and transmits or receives an LIN frame, if the CPU
requests Stop Mode, and the Stop Mode is left, an subsequent triggered LIN RX Frame
reception may hang. The module will never assert the eSCI_IFSR2[RXRDY] and
eSCI_IFSR2[TXRDY] flags.
Workaround: The application should ensure that no LIN transmission is running before it requests Stop
Mode by checking the status of the eSCI_IFSR1[TACT] and eSCI_IFSR1[RACT] status flags.
e1171: eSCI : DMA stalled after return from stop or doze mode
Errata type: Errata
Description: If the eSCI module enters stop or doze mode while the transmit DMA is enabled and
messages are being transmitted, when the CPU exits stop or doze mode, it is possible that
DMA requests will not be generated by the eSCI module.
Workaround: The application should ensure that the eSCI module is idle before entering the stop mode.
The eSCI module is idle when both transmitter and receiver active status bits in the Interrupt
Flag and Status Register 1 (eSCI_IFSR1) are not set.
The application should not trigger a new transmission on the eSCI module if the application is
preparing for the stop mode.
Mask Set Errata for Mask 3M17W, Rev 13 SEP 2013
14 Freescale Semiconductor, Inc.