Datasheet

ManualsBrandsNXP SEMICONDUCTORS ManualsLinear ICsLinear IC - Audio amplifier 1-channel (mono) or 2-channel (stereo) Class D HSOP 24

Table Of Contents

1. General description

The TDA8920C is a high-efﬁciency class-D audio power ampliﬁer. The typical output

power is 2 × 110 W with a speaker load impedance of 4 Ω.

The TDA8920C is available in both HSOP24 and DBS23P power packages. The ampliﬁer

operates over a wide supply voltage range from ±12.5 V to ±32.5 V and features low

quiescent current consumption.

2. Features

n Pin compatible with TDA8950/20B for both HSOP24 and DBS23P packages

n Symmetrical operating supply voltage range from ±12.5 V to ±32.5 V

n Stereo full differential inputs, can be used as stereo Single-Ended (SE) or mono

Bridge-Tied Load (BTL) ampliﬁer

n High output power in typical applications:

u SE 2 × 110 W, R

=4Ω (V

= ±30 V)

u SE 2 × 125 W, R

=4Ω (V

= ±32 V)

u SE 2 × 120 W, R

=3Ω (V

= ±29 V)

u BTL 1 × 220 W, R

=8Ω (V

= ±30 V)

n Low noise

n Smooth pop noise-free start-up and switch off

n Zero dead time switching

n Fixed frequency

n Internal or external clock

n High efﬁciency

n Low quiescent current

n Advanced protection strategy: voltage protection and output current limiting

n Thermal FoldBack (TFB)

n Fixed gain of 30 dB in SE and 36 dB in BTL applications

n Fully short-circuit proof across load

n BD modulation in BTL conﬁguration

3. Applications

n DVD

n Mini and micro receiver

n Home Theater In A Box (HTIAB) system

n High-power speaker system

TDA8920C

2 × 110 W class-D power ampliﬁer

Rev. 02 — 11 June 2009 Product data sheet

Summary of content (39 pages)

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TDA8920C 2 × 110 W class-D power amplifier Rev. 02 — 11 June 2009 Product data sheet 1. General description The TDA8920C is a high-efficiency class-D audio power amplifier. The typical output power is 2 × 110 W with a speaker load impedance of 4 Ω. The TDA8920C is available in both HSOP24 and DBS23P power packages. The amplifier operates over a wide supply voltage range from ±12.5 V to ±32.5 V and features low quiescent current consumption. 2.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit = ±30 V General, VP[1] VP supply voltage VP(ovp) overvoltage protection supply voltage Standby, Mute modes; VDD − VSS 65 - 70 V Iq(tot) total quiescent current - 50 75 mA - 110 - W - 90 - W - 220 - W Operating mode [2] Operating mode; no load; no filter; no RC-snubber network connected ±12.5 ±30 ±32.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier 6. Block diagram VDDA 3 (20) IN1M IN1P n.c. OSC MODE SGND n.c.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier 7. Pinning information 7.1 Pinning OSC 1 IN1P 2 IN1M 3 n.c. 4 n.c. 5 n.c. 6 PROT 7 VDDP1 8 BOOT1 9 OUT1 10 VSSP1 11 VSSD 24 1 VSSA STABI 12 VDDP2 23 2 SGND VSSP2 13 BOOT2 22 3 VDDA OUT2 21 4 IN2M BOOT2 15 VSSP2 20 5 IN2P VDDP2 16 n.c. 19 6 MODE 7 OSC VSSA 18 8 IN1P SGND 19 9 IN1M VDDA 20 STABI 18 TDA8920CTH VSSP1 17 OUT1 16 TDA8920CJ OUT2 14 VSSD 17 BOOT1 15 10 n.c. VDDP1 14 11 n.c.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier 7.2 Pin description Table 3.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier The TDA8920C single-chip class-D amplifier contains high-power switches, drivers, timing and handshaking between the power switches, along with some control logic. To ensure maximum system robustness, an advanced protection strategy has been implemented to provide overvoltage, overtemperature and overcurrent protection. Each of the two audio channels contains a PWM modulator, an analog feedback loop and a differential input stage.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier To ensure the coupling capacitors at the inputs (CIN in Figure 10) are fully charged before the outputs start switching, a delay is inserted during the transition from Mute to Operating mode. An overview of the start-up timing is provided in Figure 5. For proper switch-off, the MODE pin should be forced LOW at least 100 ms before the supply lines (VDDA and VSSA) drop below 12.5 V.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier 8.2 Pulse-width modulation frequency The amplifier output signal is a PWM signal with a typical carrier frequency of between 250 kHz and 450 kHz. A 2nd-order LC demodulation filter on the output is used to convert the PWM signal into an analog audio signal. The carrier frequency is determined by an external resistor, ROSC, connected between pins OSC and VSSA. The optimal carrier frequency setting is between 250 kHz and 450 kHz.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier 8.3.1.2 OverTemperature Protection (OTP) If TFB fails to stabilize the temperature and the junction temperature continues to rise, the amplifier will shut down as soon as the temperature reaches the thermal protection activation threshold, Tact(th_prot). The amplifier will resume switching approximately 100 ms after the temperature drops below Tact(th_prot). The thermal behavior is illustrated in Figure 6.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier When OCP is activated, the power transistors are turned off. They are turned on again during the next switching cycle. If the output current is still greater than the OCP threshold, they will be immediately switched off again. This switching will continue until CPROT is fully discharged. The amplifier will then be switched off completely and a restart sequence initiated.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier 8.3.4 Supply voltage protection If the supply voltage drops below the minimum supply voltage threshold, VP(uvp), the UVP circuit will be activated and the system will shut down. Once the supply voltage rises above VP(uvp) again, the system will restart after a delay of 100 ms. If the supply voltage exceeds the maximum supply voltage threshold, VP(ovp), the OVP circuit will be activated and the power stages will be shut down.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier OUT1 IN1P IN1M Vin SGND IN2P IN2M OUT2 power stage mbl466 Fig 7. Input configuration for mono BTL application 9. Limiting values Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VP[1] supply voltage Standby, Mute modes; VDD − VSS - 65 V IORM repetitive peak output current maximum output current limiting 9.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier 11. Static characteristics Table 8. Static characteristics VP[1] = ±30 V; fosc = 345 kHz; Tamb = 25 °C; unless otherwise specified. Symbol Parameter Conditions VP supply voltage Operating mode VP(ovp) overvoltage protection supply voltage Standby, Mute modes; VDD − VSS VP(uvp) undervoltage protection supply voltage VDD − VSS Min Typ Max Unit Supply [2] [3] ±12.5 ±30 ±32.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier slope is directly related to the time-constant of the RC network on the MODE pin VO (V) VO(offset)(on) Standby Mute On VO(offset)(mute) 0 0.8 2.2 3.0 4.2 5.5 VMODE (V) coa021 Fig 8. Behavior of mode selection pin MODE 12. Dynamic characteristics 12.1 Switching characteristics Table 9. Dynamic characteristics VP[1] = ±30 V; Tamb = 25 °C; unless otherwise specified.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier 12.2 Stereo SE configuration characteristics Table 10. Dynamic characteristics VP = ±30 V; RL = 4 Ω; fi = 1 kHz; fosc = 345 kHz; RsL[1] < 0.1 Ω; Tamb = 25 °C; unless otherwise specified. Symbol Po Parameter Conditions Min Typ Max Unit output power L = 22 µH; CLC = 680 nF; Tj = 85 °C THD = 0.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier 12.3 Mono BTL application characteristics Table 11. Dynamic characteristics VP = ±30 V; RL = 8 Ω; fi = 1 kHz; fosc = 345 kHz; RsL[1] < 0.1 Ω ; Tamb = 25 °C; unless otherwise specified. Symbol Po Parameter Conditions output power Tj = 85 °C; LLC = 22 µH; CLC = 680 nF (see Figure 10) THD = 0.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier 13. Application information 13.1 Mono BTL application When using the power amplifier in a mono BTL application, the inputs of the two channels must be connected in parallel and the phase of one of the inputs must be inverted; see Figure 7. In principle, the loudspeaker can be connected between the outputs of the two single-ended demodulation filters. 13.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier 13.3.2 Bridge-Tied Load (BTL) Maximum output power: P o ( 0.5% ) 2 RL ------------------------------------------------------------------- × 2V P × ( 1 – t w ( min ) × 0.5 f osc ) R L + R DSon ( hs ) + R DSon ( ls ) = ----------------------------------------------------------------------------------------------------------------------------------------------------------2R L (3) Maximum output current internally limited to 9.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier 13.5 Heatsink requirements An external heatsink must be connected to the TDA8920C. Equation 5 defines the relationship between maximum power dissipation before activation of TFB and total thermal resistance from junction to ambient. T j – T amb Rth ( j – a ) = ----------------------P (5) Power dissipation (P) is determined by the efficiency of the TDA8920C. Efficiency measured as a function of output power is given in Figure 20.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier In the following example, a heatsink calculation is made for an 8 Ω BTL application with a ±30 V supply: The audio signal has a crest factor of 10 (the ratio between peak power and average power (20 dB)); this means that the average output power is 1⁄10 of the peak power. Thus, the peak RMS output power level is the 0.5 % THD level, i.e. 170 W. The average power is then 1⁄10 × 170 W = 17 W.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier The most effective way to avoid pumping effects is to connect the TDA8920C in a mono full-bridge configuration. In the case of stereo single-ended applications, it is advised to connect the inputs in anti-phase (see Section 8.4 on page 11). The power supply can also be adapted; for example, by increasing the values of the supply line decoupling capacitors. 13.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier 13.8 Curves measured in reference design 010aaa532 10 THD (%) 1 10−1 (1) (2) 10−2 (3) 10−3 10−2 10−1 1 102 10 103 Po (W) VP = ±30 V, fosc = 350 kHz, 2 × 4 Ω SE configuration. (1) fi = 6 kHz. (2) fi = 1 kHz. (3) fi = 100 Hz. Fig 11.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier 010aaa534 10 THD (%) 1 10−1 (1) (2) 10−2 10−3 10−2 (3) 10−1 1 102 10 103 Po (W) VP = ±30 V, fosc = 350 kHz, 1 × 8 Ω BTL configuration. (1) fi = 6 kHz. (2) fi = 1 kHz. (3) fi = 100 Hz. Fig 13. THD + N as a function of output power, BTL configuration with 1 × 8 Ω load 010aaa535 10 THD (%) 1 10−1 (1) 10−2 10−3 10 (2) 102 103 104 fi (Hz) 105 VP = ±30 V, fosc = 350 kHz, 2 × 4 Ω SE configuration. (1) Po = 1 W. (2) Po = 10 W.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier 010aaa536 10 THD (%) 1 10−1 (1) 10−2 10−3 10 (2) 102 103 104 fi (Hz) 105 VP = ±30 V, fosc = 350 kHz, 2 × 6 Ω SE configuration. (1) Po = 1 W. (2) Po = 10 W. Fig 15. THD + N as a function of frequency, SE configuration with 2 × 6 Ω load 010aaa537 10 THD (%) 1 10−1 (1) 10−2 10−3 10 (2) 102 103 104 fi (Hz) 105 VP = ±30 V, fosc = 350 kHz, 1 × 8 Ω BTL configuration. (1) Po = 1 W. (2) Po = 10 W. Fig 16.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier 001aai703 0 αcs (dB) −20 −40 −60 −80 −100 10 102 103 104 105 fi (Hz) VP = ±30 V, fosc = 350 kHz, 2 × 4 Ω SE configuration. 1 W and 10 W respectively. Fig 17. Channel separation as a function of frequency, SE configuration with 2 × 4 Ω load 001aai704 0 αcs (dB) −20 −40 −60 −80 −100 10 102 103 104 105 fi (Hz) VP = ±30 V, fosc = 350 kHz, 2 × 6 Ω SE configuration. 1 W and 10 W respectively. Fig 18.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier P (W) 010aaa538 40 35 30 25 (1) 20 (2) 15 10 (3) 5 0 0 20 40 60 80 100 120 Po (W) VP = ±30 V, fi = 1 kHz; fosc = 350 kHz (1) 2 × 4 Ω SE configuration. (2) 2 × 6 Ω SE configuration. (3) 2 × 8 Ω SE configuration. Fig 19.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier 001aai859 140 Po (W) 120 (1) 100 (2) 80 (3) 60 (4) 40 20 0 12.5 17.5 22.5 27.5 32.5 VP (V) Infinite heat sink used. fi = 1 kHz, fosc = 350 kHz. (1) THD + N = 10 %, 4 Ω. (2) THD + N = 0.5 %, 4 Ω; THD + N = 10 %, 6 Ω. (3) THD + N = 10 %, 8 Ω; THD + N = 0.5 %, 6 Ω (4) THD + N = 0.5 %, 8 Ω. Fig 21. Output power as a function of supply voltage, SE configuration 001aai860 300 Po (W) (1) 200 (2) (3) 100 0 12.5 (4) 17.5 22.5 27.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier 010aaa540 40 (1) Gv(cl) (dB) (2) (3) 30 (4) 20 10 102 10 103 104 105 fi (Hz) VP = ±30 V, fosc = 350 kHz, Vi = 100 mV, Ci = 330 pF, LLC = 15 µH, CLC = 680 nF. (1) 1 × 8 Ω BTL configuration. (2) 2 × 4 Ω SE configuration. (3) 2 × 6 Ω SE configuration. (4) 2 × 8 Ω SE configuration. Fig 23.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier 001aai711 −20 SVRR (dB) −40 −60 −80 (2) (1) −100 −120 (3) −140 102 10 103 104 106 fripple (Hz) Ripple on VSS, short on input pins. VP = ±30 V, RL = 4 Ω, Vripple = 2 V (p-p). (1) Mute mode. (2) Operating mode. (3) Standby mode. Fig 25. SVRR as a function of ripple frequency, ripple on VSS 001aai712 10 Vo (V) 1 10−1 10−2 10−3 10−4 (1) (2) 10−5 10−6 0 0.5 1 1.5 2 2.5 3 3.5 4 4.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier 010aaa541 −50 αmute (dB) −60 −70 (1) −80 (2) (3) −90 10 102 103 104 105 fi (Hz) VP = ±30 V, fosc = 325 kHz, Vi = 2 V (RMS). (1) 8 Ω. (2) 6 Ω. (3) 4 Ω. Fig 27. Mute attenuation as a function of frequency TDA8920C_2 Product data sheet © NXP B.V. 2009. All rights reserved. Rev.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier 14. Package outline DBS23P: plastic DIL-bent-SIL power package; 23 leads (straight lead length 3.2 mm) SOT411-1 non-concave Dh x D Eh view B: mounting base side A2 d A5 A4 β E2 B j E E1 L2 L3 L1 L 1 e1 Z e 0 5 v M e2 m w M bp c Q 23 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A 2 mm A4 A5 bp c D (1) d D h E (1) e e1 e2 12.2 4.6 1.15 1.65 0.75 0.55 30.4 28.0 12 2.54 1.27 5.08 11.8 4.3 0.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier HSOP24: plastic, heatsink small outline package; 24 leads; low stand-off height SOT566-3 E D A x X c E2 y HE v M A D1 D2 12 1 pin 1 index Q A A2 E1 (A3) A4 θ Lp detail X 24 13 Z w M bp e 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT mm A A2 max. 3.5 3.5 3.2 A3 0.35 A4(1) D1 D2 E(2) E1 E2 e HE Lp Q +0.08 0.53 0.32 16.0 13.0 −0.04 0.40 0.23 15.8 12.6 1.1 0.9 11.1 10.9 6.2 5.8 2.9 2.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier 15. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description”. 15.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier 15.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier temperature maximum peak temperature = MSL limit, damage level minimum peak temperature = minimum soldering temperature peak temperature time 001aac844 MSL: Moisture Sensitivity Level Fig 30. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. 16. Soldering of through-hole mount packages 16.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier 16.4 Package related soldering information Table 14. Suitability of through-hole mount IC packages for dipping and wave soldering Package Soldering method Dipping Wave CPGA, HCPGA - suitable DBS, DIP, HDIP, RDBS, SDIP, SIL suitable suitable[1] PMFP[2] - not suitable [1] For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier 18. Legal information 18.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
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TDA8920C NXP Semiconductors 2 × 110 W class-D power amplifier 20. Contents 1 2 3 4 5 6 7 7.1 7.2 8 8.1 8.2 8.3 8.3.1 8.3.1.1 8.3.1.2 8.3.2 8.3.3 8.3.4 8.4 9 10 11 12 12.1 12.2 12.3 13 13.1 13.2 13.3 13.3.1 13.3.2 13.4 13.5 13.6 13.7 13.8 14 15 15.1 15.2 15.3 15.4 16 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . .