Datasheet

ManualsBrandsNXP SEMICONDUCTORS ManualsLinear ICsLinear IC - Audio amplifier 1-channel (mono) or 2-channel (stereo) Class D DBS 23

1. General description

The TDA8954 is a stereo or mono high-efficiency Class D audio power amplifier in a

single IC featuring low power dissipation. It is designed to deliver up to 2 × 210

W into a

Ω load in a stereo Single-Ended (SE) application, or 1 × 420 W into an 8 Ω load in a

mono Bridge-Tied Load (BTL) application.

It combines the benefits of Class D efficiency (≈93 % into a 4 Ω load) with audiophile

sound quality comparable to that associated with Class AB amplification.

The amplifier operates over a wide supply voltage range from ±12.5 V to ±42.5 V and

features low quiescent current consumption.

The TDA8954 is supplied with two diagnostic pins for monitoring the status of Thermal

Fold Back (TFB), Over Current Protection (OCP) and other protection circuits.

2. Features

 High output power in typical applications:

 SE 2 × 210 W, R

= 4 Ω (V

= 41 V; V

= −41 V)

 SE 2 × 235 W, R

= 3 Ω (V

= 39 V; V

= −39 V)

 SE 2 × 150 W, R

= 6 Ω (V

= 41 V; V

= −41 V)

 BTL 1 × 420 W, R

= 8 Ω (V

= 41 V; V

= −41 V)

 Symmetrical operating supply voltage range from ±12.5 V to ±42.5 V

 Stereo full differential inputs, can be used as stereo SE or mono BTL amplifier

 Low noise

 Smooth pop noise-free start-up and switch off

 2-pin diagnostics for protection circuits

 Fixed frequency internal or external clock

 High efficiency ≈93 %

 Zero dead time switching

 Low quiescent current

 Advanced protection strategy: voltage protection and output current limiting

 Thermal FoldBack (TFB) with disable functionality

 Fixed gain of 30 dB in SE and 36 dB in BTL applications

 Fully short-circuit proof across load

 BD modulation in BTL configuration

 Clock protection

TDA8954

2 × 210 W class-D power amplifier

Rev. 01 — 24 December 2009 Product data sheet

Summary of content (46 pages)

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TDA8954 2 × 210 W class-D power amplifier Rev. 01 — 24 December 2009 Product data sheet 1. General description The TDA8954 is a stereo or mono high-efficiency Class D audio power amplifier in a single IC featuring low power dissipation. It is designed to deliver up to 2 × 210 W into a 4 Ω load in a stereo Single-Ended (SE) application, or 1 × 420 W into an 8 Ω load in a mono Bridge-Tied Load (BTL) application.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 3. Applications DVD Mini and micro receiver Subwoofers Home Theater In A Box (HTIAB) system High-power speaker system Public Address (PA) system 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit 41 42.5 V General VDD positive supply voltage Operating mode [1] 12.5 VSS negative supply voltage Operating mode [2] −12.5 −41 −42.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 6.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 7. Pinning information 7.1 Pinning OSC 1 IN1P 2 IN1M 3 DIAG1 4 OSCREF 5 DIAG2 6 PROT 7 VDDP1 8 BOOT1 9 OUT1 10 VSSP1 11 VSSA 24 1 VSSA STABI 12 VDDP2 23 2 SGND VSSP2 13 BOOT2 22 3 VDDA OUT2 21 4 IN2M BOOT2 15 VSSP2 20 5 IN2P VDDP2 16 n.c. 19 6 MODE 7 OSC VSSA 18 VSSP1 17 8 IN1P SGND 19 OUT1 16 9 IN1M VDDA 20 STABI 18 TDA8954TH BOOT1 15 10 DIAG1 VDDP1 14 11 OSCREF OUT2 14 n.c.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 7.2 Pin description Table 3.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier The TDA8954 single-chip Class D amplifier contains high-power switches, drivers, timing and handshaking between the power switches, along with some control logic. To ensure maximum system robustness, an advanced protection strategy has been implemented to provide overvoltage, overtemperature and overcurrent protection. Each of the two audio channels contains a PWM modulator, an analog feedback loop and a differential input stage.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier The smooth transition between Mute and Operating modes causes a gradual increase in the DC offset output voltage, which becomes inaudible (no pop noise because the DC offset voltage rises smoothly). An overview of the start-up timing is provided in Figure 5. For proper switch-off, the MODE pin should be forced LOW at least 100 ms before the supply lines (VDD and VSS) drop below 12.5 V.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 8.2 Diagnostics The TDA8954 provides two diagnostic signals on pins DIAG1 and DIAG2. Both are open-drain outputs that can be pulled up via a resistor (10 kΩ recommended) to a maximum of 5 V relative to the GND pin. The maximum input current on these pins is 1 mA. Pin DIAG1 provides a TFB warning signal.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 8.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier VLOAD Thermal foldback activated VDIAG1 T Tact(th_fold) Tact(warn)th_fold t Fig 7. 010aaa561 TFB and TFB warning Thermal foldback is active when: Tact(th_fold) < Tj < Tact(th_prot) The value of Tact(th_fold) for the TDA8954 is approximately 145 °C; see Table 9 for more details. The gain will be reduced by at least 6 dB (to Thg(th_fold)) before the temperature reaches Tact(th_prot) (see Figure 8).
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier VPULL-UP VDIAG1 T 30 Gain [dB] 24 1 Thg(th_fold) 2 Tact(th_prot) T Tact(th_fold) Trst(warn)th_fold Tact(warn)th_fold 0 3 010aaa562 (1) Duty cycle of PWM output modulated according to the audio input signal. (2) Duty cycle of PWM output reduced due to TFB. (3) Amplifier is switched off due to OTP. Fig 8. Behavior of TFB, OTP and signal on pin DIAG1 8.4.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier When OCP is activated, the active power transistor is turned off and the other power transistor is turned on to reduce the current (CPROT is partially discharged). Normal operation is resumed at the next switching cycle (CPROT is recharged). CPROT is partially discharge each time OCP is activated during a switching cycle.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier switch off amplifier VDIAG2 IMAX current limiting short circuit protection IOUT short to VDDP applied t Fig 9. 010aaa563 Current limiting 8.4.3 Window Protection (WP) Window Protection (WP) checks the conditions at the output terminals of the power stage and is activated: • During the start-up sequence, when the TDA8954 is switching from Standby to Mute.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 8.4.5 Clock protection (CP) The clock signal can be provided by an external oscillator connected to pin OSC (see Section 14.4). When this signal is lost, or the clock frequency is too low, the amplifier will be switched off and will remain off until the clock signal has been restored. 8.4.6 Overview of protection functions An overview of all protection circuits and their respective effects on the output signal is provided in Table 5. Table 5.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier OUT1 IN1P IN1M Vin SGND IN2P IN2M OUT2 power stage mbl466 Fig 10. Input configuration for mono BTL application TDA8954_1 Product data sheet © NXP B.V. 2009. All rights reserved. Rev.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 9. Internal circuitry Table 6. Internal circuitry Pin Symbol TDA8954TH TDA8954J 7 1 Equivalent circuit[1] OSC VDD 150 μA open: external clock closed: internal clock 7 (1) VSS 11 5 010aaa589 OSCREF 2Ω VSS 11 (5) 010aaa590 10 4 DIAG1 12 6 DIAG2 10, 12 (4, 6) SGND 010aaa591 13 7 PROT 50 μA current limiting 13 (7) OCP 28 μA 1.5 mA VSS 010aaa592 TDA8954_1 Product data sheet © NXP B.V. 2009. All rights reserved.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier Table 6.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 10. Limiting values Table 7. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier Table 9. Static characteristics …continued VDD = 41 V; VSS = −41 V; fosc = 335 kHz; Tamb = 25 °C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit IDD(tot) total positive supply current the sum of the currents through pins VDDA, VDDP1 and VDDP2 - 50 60 mA - 65 75 mA - 490 650 μA [4] 0 - 8 V Standby mode [4][5] 0 - 0.8 V Mute mode [4][5] 2.2 - 3.0 V Operating mode [4][5] 4.2 - 5.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier [6] DC output offset voltage is gradually applied to the output during the transition between Mute and Operating modes. The slope caused by any DC output offset is determined by the time-constant of the RC network on pin MODE. Slope is directly related to the time constant of the RC network on the MODE pin On no TFB On VO[V] Mute Standby VO(offset)(on) VO(offset)(mute) 0 0.8 2.2 3.0 4.2 5.5 VMODE[V] Fig 11. 6.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 13.2 Stereo SE configuration characteristics Table 11. Dynamic characteristics VDD = 41 V; VSS = −41 V; RL = 4 Ω; fi = 1 kHz; fosc = 335 kHz; RsL < 0.1 Ω[1]; Tamb = 25 °C; unless otherwise specified. Symbol Po Parameter Conditions output power L = 15 μH; CLC = 680 nF; Tj = 85 °C THD = 0.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 13.3 Mono BTL application characteristics Table 12. Dynamic characteristics VDD = 41 V; VSS = −41 V; RL = 8 Ω; fi = 1 kHz; fosc = 335 kHz; RsL < 0.1 Ω [1]; Tamb = 25 °C; unless otherwise specified. Symbol Po Parameter Conditions output power Tj = 85 °C; LLC = 15 μH; CLC = 680 nF (see Figure 13) THD = 0.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 14. Application information 14.1 Mono BTL application When using the power amplifier in a mono BTL application, the inputs of the two channels must be connected in anti-parallel and the phase of one of the inputs must be inverted; see Figure 10. In principle, the loudspeaker can be connected between the outputs of the two single-ended demodulation filters. 14.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 14.3.2 Bridge-Tied Load (BTL) Maximum output power: 2 RL ------------------------------------------------------------------ × ( V DD – V SS ) × ( 1 – t w ( min ) × 0.5f osc ) R L + R DSon ( hs ) + R DSon ( ls ) P o ( 0.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier T j – T amb Rth (j – a ) = ---------------------P (5) Power dissipation (P) is determined by the efficiency of the TDA8954. mbl469 30 P (W) (1) 20 (2) 10 (3) (4) (5) 0 0 20 40 60 80 100 Tamb (°C) (1) Rth(j-a) = 5 K/W. (2) Rth(j-a) = 10 K/W. (3) Rth(j-a) = 15 K/W. (4) Rth(j-a) = 20 K/W. (5) Rth(j-a) = 35 K/W. Fig 12.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier Rth(h-a) (thermal resistance from heatsink to ambient) = 10.3 − (0.9 + 1) = 8.4 K/W The derating curves for power dissipation (for several Rth(j-a) values) are illustrated in Figure 12. A maximum junction temperature Tj = 150 °C is taken into account. The maximum allowable power dissipation for a given heatsink size can be derived, or the required heatsink size can be determined, at a required power dissipation level; see Figure 12. 14.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 14.8 Curves measured in reference design (demo board TDA8954J) 010aaa598 10 THD+N (%) 1 (1) (2) 10−1 (3) 10−2 10−2 10−1 1 102 10 103 Po (W) VDD = 41 V, VSS = −41 V, fosc = 325 kHz (external 650 kHz oscillator), 2 × 4 Ω SE configuration. (1) fi = 1 kHz. (2) fi = 6 kHz. (3) fi = 100 Hz. Fig 14.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 010aaa600 10 THD+N (%) 1 (2) (1) 10−1 10−2 10−2 (3) 10−1 1 102 10 103 Po (W) VDD = 41 V, VSS = −41, fosc = 325 kHz (external 650 kHz oscillator), 1 × 8 Ω BTL configuration. (1) fi = 1 kHz. (2) fi = 6 kHz. (3) fi = 100 Hz. Fig 16.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 010aaa656 1 THD+N (%) (3) 10−1 (1) (2) 10−2 10 102 103 104 105 fi (Hz) VDD = 39 V, VSS = −39, fosc = 325 kHz (external 650 kHz oscillator), 2 × 3 Ω SE configuration. (1) Po = 1 W. (2) Po = 10 W. (3) Po = 100 W. Fig 18.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 010aaa604 0 Chan sep (dB) −20 −40 −60 −80 −100 102 10 103 104 105 fi (Hz VDD = 41 V, VSS = −41, fosc = 325 kHz (external 650 kHz oscillator), 2 × 4 Ω SE configuration. Channel B S/N (dB). Fig 20.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 010aaa606 60 PD (W) (1) 40 (2) 20 (3) 0 10−2 10−1 1 102 103 Po (W/channel) 10 fi = 1 kHz; fosc = 325 kHz (external 650 kHz oscillator). (1) 2 × 3 Ω SE configuration; VDD = 39 V; VSS = −39 V. (2) 2 × 4 Ω SE configuration; VDD = 41 V; VSS = −41 V. (3) 2 × 6 Ω SE configuration; VDD = 41 V; VSS = −41 V. Fig 22.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 010aaa608 250 (1) Po (W) (2) 200 (3) (4) 150 100 50 0 12.5 17.5 22.5 27.5 32.5 37.5 Vp ±(V) 42.5 Infinite heat sink used. fi = 1 kHz, fosc = 325 kHz (external 650 kHz oscillator). (1) THD + N = 10 %, 2 × 3 Ω. (2) THD + N = 10 %, 2 × 4 Ω (1) THD + N = 0.5 %, 2 × 3 Ω (2) THD + N = 0.5 %, 2 × 4 Ω. Fig 24. Output power as a function of supply voltage, SE configuration 010aaa609 500 Po (W) 400 (1) 300 (2) 200 100 0 12.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 010aaa610 40 (1) Gain (dB) (2) 30 (3) 20 10 0 102 10 103 104 105 Fi (Hz) VDD = 30 V, VSS = −30 V, fosc = 325 kHz (external 650 kHz oscillator), Vi = 100 mV, Ci = 330 pF. (1) 1 × 8 Ω configuration; LLC = 15 μH, CLC = 680 nF, VDD = 41 V, VSS = −41 V. (2) 2 × 4 Ω configuration; LLC = 15 μH, CLC = 680 nF, VDD = 41 V, VSS = −41 V. (3) 2 × 3 Ω configuration; LLC = 15 μH, CLC = 680 nF, VDD = 39 V; VSS = −39 V. Fig 26.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 010aaa612 0 SVRR (dB) −20 −40 −60 (1) −80 (2) −100 102 10 103 104 105 Fi (Hz) Ripple on VSS, short on input pins. VDD = 41 V, VSS = −41 V, Vripple = 2 V (p-p), 2 × 4 Ω SE configuration. (1) Mute mode. (2) Operating mode. Fig 28.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 010aaa614 0 Mute Suppression (dB) −20 −40 −60 −80 −100 10 102 103 104 105 Fi (Hz) VDD = 39 V, VSS = −39 V, fosc = 325 kHz (external 650 kHz oscillator), Vi = 2 V (RMS). 2 × 3 Ω SE configuration; channel A suppression (dB) Fig 30.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 010aaa630 300 Po (W) (3) 200 (1) 100 OTP activated (2) (4) 0 0 100 200 300 400 500 600 T (sec) VDD = 39 V, VSS = −39 V, fosc = 325 kHz (external 650 kHz oscillator), 2 × 3 Ω SE configuration. Heat sink: Fisher SK495/50; Sil-Pad: 1500ST. Condition: 30 minutes pre-heated in Mute (1) Maximum output power; TFB on. (2) Maximum output power / 8; TFB on. (3) Maximum output power; TFB off. (4) Maximum output power / 8; TFB off. Fig 32.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 15. Package outline DBS23P: plastic DIL-bent-SIL power package; 23 leads (straight lead length 3.2 mm) SOT411-1 non-concave Dh x D Eh view B: mounting base side A2 d A5 A4 β E2 B j E E1 L2 L3 L1 L 1 e1 Z e 0 5 v M e2 m w M bp c Q 23 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A 2 mm A4 A5 bp c D (1) d D h E (1) e e1 e2 12.2 4.6 1.15 1.65 0.75 0.55 30.4 28.0 12 2.54 1.27 5.08 11.8 4.3 0.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier HSOP24: plastic, heatsink small outline package; 24 leads; low stand-off height SOT566-3 E D A x X c E2 y HE v M A D1 D2 12 1 pin 1 index Q A A2 E1 (A3) A4 θ Lp detail X 24 13 Z w M bp e 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT mm A A2 max. 3.5 3.5 3.2 A3 0.35 A4(1) D1 D2 E(2) E1 E2 e HE Lp Q +0.08 0.53 0.32 16.0 13.0 −0.04 0.40 0.23 15.8 12.6 1.1 0.9 11.1 10.9 6.2 5.8 2.9 2.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 16. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description”. 16.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 16.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier maximum peak temperature = MSL limit, damage level temperature minimum peak temperature = minimum soldering temperature peak temperature time 001aac844 MSL: Moisture Sensitivity Level Fig 36. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. 17. Soldering of through-hole mount packages 17.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 17.4 Package related soldering information Table 15. Suitability of through-hole mount IC packages for dipping and wave soldering Package Soldering method Dipping Wave CPGA, HCPGA - suitable DBS, DIP, HDIP, RDBS, SDIP, SIL suitable suitable[1] PMFP[2] - not suitable [1] For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 18. Revision history Table 16. Revision history Document ID Release date Data sheet status Change notice Supersedes TDA8954_1 20091224 Product data sheet - - TDA8954_1 Product data sheet © NXP B.V. 2009. All rights reserved. Rev.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 19. Legal information 19.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
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TDA8954 NXP Semiconductors 2 × 210 W class-D power amplifier 21. Contents 1 2 3 4 5 6 7 7.1 7.2 8 8.1 8.2 8.3 8.4 8.4.1 8.4.1.1 8.4.1.2 8.4.2 8.4.3 8.4.4 8.4.5 8.4.6 8.5 9 10 11 12 13 13.1 13.2 13.3 14 14.1 14.2 14.3 14.3.1 14.3.2 14.4 14.5 14.6 14.7 14.8 15 16 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Quick reference data . . . . . . . .