Datasheet

2000 Jul 31 12
NXP Semiconductors Product specification
Low power audio DAC with PLL UDA1334ATS
Notes
1. All supply connections must be made to the same external power supply unit.
2. When the DAC drives a capacitive load above 50 pF, a series resistance of 100 Ω must be used to prevent
oscillations in the output operational amplifier.
14 AC CHARACTERISTICS
14.1 Analog
V
DDD
=V
DDA
=3.0V; f
i
=1kHz; T
amb
=25°C; R
L
=5kΩ; all voltages with respect to ground (pins V
SSA
and V
SSD
);
unless otherwise specified.
Digital input pins: TTL compatible
V
IH
HIGH-level input voltage 2.0 − 5.0 V
V
IL
LOW-level input voltage −0.5 − +0.8 V
⎪I
LI
⎪ input leakage current −−1 μA
C
i
input capacitance −−10 pF
3-level input: pin PLL0
V
IH
HIGH-level input voltage 0.9V
DDD
− V
DDD
+0.5 V
V
IM
MID-level input voltage 0.4V
DDD
− 0.6V
DDD
V
V
IL
LOW-level input voltage −0.5 − +0.5 V
Digital output pins
V
OH
HIGH-level output voltage I
OH
= −2mA 0.85V
DDD
−− V
V
OL
LOW-level output voltage I
OL
=2mA −−0.4 V
DAC
V
ref(DAC)
reference voltage with respect to V
SSA
0.45V
DD
0.5V
DD
0.55V
DD
V
R
o(ref)
output resistance on
pin V
ref(DAC)
− 25 − kΩ
I
o(max)
maximum output current (THD + N)/S < 0.1%;
R
L
=5kΩ
− 1.6 − mA
R
L
load resistance 3 −− kΩ
C
L
load capacitance note 2 −−50 pF
SYMBOL PARAMETER CONDITIONS TYP. UNIT
DAC
V
o(rms)
output voltage (RMS value) at 0 dB (FS) digital input; note 1 900 mV
ΔV
o
unbalance between channels 0.1 dB
(THD + N)/S total harmonic
distortion-plus-noise to signal
ratio
f
s
=44.1kHz; at 0dB −90 dB
f
s
=44.1kHz; at −60 dB; A-weighted −40 dB
f
s
=96kHz; at 0dB −85 dB
f
s
=96kHz; at −60 dB; A-weighted −38 dB
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT