Datasheet

ManualsBrandsNXP SEMICONDUCTORS ManualsLogic ICsLogic IC - Buffer, driver XSON 6

1. General description

XC7SET125 is a high-speed Si-gate CMOS devices. It provides one non-inverting

buffer/line driver with 3-state output. The 3-state output is controlled by the output enable

input (OE). A HIGH at OE causes the output to assume a high-impedance OFF-state.

2. Features

n Symmetrical output impedance

n High noise immunity

n Low power dissipation

n Balanced propagation delays

n SOT353-1 and SOT753 package options

n ESD protection:

u HBM JESD22-A114E: exceeds 2000 V

u MM JESD22-A115-A: exceeds 200 V

u CDM JESD22-C101C: exceeds 1000 V

n Speciﬁed from −40 °C to +125 °C

3. Ordering information

XC7SET125

Bus buffer/line driver; 3-state

Rev. 01 — 4 September 2009 Product data sheet

Table 1. Ordering information

Type number Package

Temperature range Name Description Version

XC7SET125GW −40 °C to +125 °C TSSOP5 plastic thin shrink small outline package;

5 leads; body width 1.25 mm

SOT353-1

XC7SET125GV −40 °C to +125 °C SC-74A plastic surface-mounted package; 5 leads SOT753

XC7SET125GM

−40 °C to +125 °C XSON6 plastic extremely thin small outline package; no

leads; 6 terminals; body 1 × 1.45 × 0.5 mm

SOT886

XC7SET125GF

−40 °C to +125 °C XSON6 plastic extremely thin small outline package;

no leads; 6 terminals; body 1 × 1 × 0.5 mm

SOT891

Summary of content (14 pages)

PAGE 1
XC7SET125 Bus buffer/line driver; 3-state Rev. 01 — 4 September 2009 Product data sheet 1. General description XC7SET125 is a high-speed Si-gate CMOS devices. It provides one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (OE). A HIGH at OE causes the output to assume a high-impedance OFF-state. 2.
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XC7SET125 NXP Semiconductors Bus buffer/line driver; 3-state 4. Marking Table 2. Marking codes Type number Marking[1] XC7SET125GW gM XC7SET125GV g25 XC7SET125GM gM XC7SET125GF gM [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram A 2 Y 4 Y A 2 4 OE 1 1 EN mna118 Fig 1. OE mna120 mna119 Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram 6. Pinning information 6.
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XC7SET125 NXP Semiconductors Bus buffer/line driver; 3-state 6.2 Pin description Table 3. Pin description Symbol Pin Description SOT353-1/SOT753 SOT886/SOT891 OE 1 1 output enable input A 2 2 data input GND 3 3 ground (0 V) Y 4 4 data output n.c. - 5 not connected VCC 5 6 supply voltage 7. Functional description Table 4.
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XC7SET125 NXP Semiconductors Bus buffer/line driver; 3-state 9. Recommended operating conditions Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit 4.5 5.0 5.5 V VCC supply voltage VI input voltage 0 - 5.5 V VO output voltage 0 - VCC V Tamb ambient temperature −40 +25 +125 °C ∆t/∆V input transition rise and fall rate - - 20 ns/V 10. Static characteristics Table 7.
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XC7SET125 NXP Semiconductors Bus buffer/line driver; 3-state 11. Dynamic characteristics Table 8. Dynamic characteristics GND = 0 V; For test circuit see Figure 9. Symbol Parameter propagation delay tpd 25 °C Conditions Min Typ Max Min Max Min Max - 3.4 5.5 1.0 6.5 1.0 7.0 ns - 4.8 7.5 1.0 8.5 1.0 9.5 ns - 3.9 5.1 1.0 6.0 1.0 6.5 ns - 5.1 7.5 1.0 8.5 1.0 9.5 ns - 4.5 6.8 1.0 8.0 1.0 8.5 ns - 6.1 8.8 1.0 10.0 1.0 11.
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XC7SET125 NXP Semiconductors Bus buffer/line driver; 3-state VI OE input VM GND tPLZ tPZL VCC output LOW-to-OFF OFF-to-LOW VM VX VOL tPHZ VOH tPZH VY output HIGH-to-OFF OFF-to-HIGH VM GND outputs enabled outputs enabled outputs disabled mna644 Measurement points are given in Table 9. VOL and VOH are typical output voltage levels that occur with the output load. Fig 8. Table 9. Enable and disable times Measurement points Type XC7SET125 Input Output VM VM VX VY 1.5 V 0.5VCC VOL + 0.
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XC7SET125 NXP Semiconductors Bus buffer/line driver; 3-state VI tW 90 % negative pulse VM 0V tf tr tr tf VI 90 % positive pulse 0V VM 10 % VM VM 10 % tW VCC VCC G VI VO RL S1 open DUT RT CL 001aad983 Test data is given in Table 10. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch. Fig 9. Table 10.
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XC7SET125 NXP Semiconductors Bus buffer/line driver; 3-state 13. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm E D SOT353-1 A X c y HE v M A Z 5 4 A2 A (A3) A1 θ 1 Lp 3 L e w M bp detail X e1 0 1.5 3 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(1) e e1 HE L Lp v w y Z(1) θ mm 1.1 0.1 0 1.0 0.8 0.15 0.30 0.15 0.25 0.08 2.25 1.85 1.35 1.15 0.65 1.3 2.25 2.0 0.
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XC7SET125 NXP Semiconductors Bus buffer/line driver; 3-state Plastic surface-mounted package; 5 leads SOT753 D E B y A X HE 5 v M A 4 Q A A1 c 1 2 3 Lp detail X bp e w M B 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 bp c D E e HE Lp Q v w y mm 1.1 0.9 0.100 0.013 0.40 0.25 0.26 0.10 3.1 2.7 1.7 1.3 0.95 3.0 2.5 0.6 0.2 0.33 0.23 0.2 0.2 0.
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XC7SET125 NXP Semiconductors Bus buffer/line driver; 3-state XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm SOT886 b 1 2 3 4× (2) L L1 e 6 5 e1 4 e1 6× A (2) A1 D E terminal 1 index area 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A (1) max A1 max b D E e e1 L L1 mm 0.5 0.04 0.25 0.17 1.5 1.4 1.05 0.95 0.6 0.5 0.35 0.27 0.40 0.32 Notes 1. Including plating thickness. 2.
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XC7SET125 NXP Semiconductors Bus buffer/line driver; 3-state XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm 1 SOT891 b 3 2 4× (1) L L1 e 6 5 e1 4 e1 6× A (1) A1 D E terminal 1 index area 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max A1 max b D E e e1 L L1 mm 0.5 0.04 0.20 0.12 1.05 0.95 1.05 0.95 0.55 0.35 0.35 0.27 0.40 0.32 Note 1. Can be visible in some manufacturing processes.
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XC7SET125 NXP Semiconductors Bus buffer/line driver; 3-state 14. Abbreviations Table 11. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 15. Revision history Table 12.
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XC7SET125 NXP Semiconductors Bus buffer/line driver; 3-state 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
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XC7SET125 NXP Semiconductors Bus buffer/line driver; 3-state 18. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . .