Datasheet

XC7SET125_1 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 01 — 4 September 2009 2 of 14
NXP Semiconductors
XC7SET125
Bus buffer/line driver; 3-state
4. Marking
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
6. Pinning information
6.1 Pinning
Table 2. Marking codes
Type number Marking
[1]
XC7SET125GW gM
XC7SET125GV g25
XC7SET125GM gM
XC7SET125GF gM
Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram
mna118
AY
2
1
4
OE
mna119
1
4
2
EN
mna120
A
Y
OE
Fig 4. Pin configuration
SOT353-1 and SOT753
Fig 5. Pin configuration SOT886 Fig 6. Pin configuration SOT891
XC7SET125
OE V
CC
A
GND Y
001aak126
1
2
3
5
4
XC7SET125
A
001aak127
OE
GND
n.c.
V
CC
Y
Transparent top view
2
3
1
5
4
6
XC7SET125
A
001aak128
OE
GND
n.c.
V
CC
Y
Transparent top view
2
3
1
5
4
6