Datasheet

Analog Integrated Circuit Device Data
32 Freescale Semiconductor
07XSC200
5.3.1.2 Severe Short-circuit Fault
The 07XSC200 provides output shutdown to protect each output in case of a severe short-circuit during of the output switching.
If the short-circuit impedance is below R
SHORT,
the device will latch the output OFF, FSB will go to logic [0] and the fault register
SC[0:1] bit will be set to [1]. To delatch the fault and be able to turn ON again the outputs, the failure condition must disappear
and the corresponding output must be commanded OFF and then ON (toggling fault_control signal of corresponding output) or
V
SUPPLY(POR)
condition if V
DD
= 0.
The SPI fault report (SC[0:1] bits) is removed after a read operation.
5.3.1.3 Overvoltage Fault (Enabled by Default)
By default, the overvoltage protection is enabled. The 07XSC200 shuts down all outputs and FSB will go to logic [0] during an
overvoltage fault condition on the VPWR pin (V
PWR
> V
PWR(OV)
). The outputs remain in the OFF state until the overvoltage
condition is removed (V
PWR
< V
PWR(OV)
- V
PWR(OVHYS)
). When experiencing this fault, the OVF fault bit is set to logic [1] and
cleared after either a valid SPI read.
The overvoltage protection can be disabled through the SPI (OV_dis bit is disabled set to logic [1]). The fault register reflects any
overvoltage condition (V
PWR
> V
PWR(OV)
). This overvoltage diagnosis, as a warning, is removed after a read operation, if the fault
condition disappears. The HS[0:1] outputs are not commanded in R
DS(ON)
above the OV threshold.
5.3.1.4 Undervoltage Fault
The output(s) will latch off at some battery voltage below VPWR
(UV)
. As long as the V
DD
level stays within the normal specified
range, the internal logic states within the device will remain (configuration and reporting).
In the case where battery voltage drops below the undervoltage threshold (V
PWR
< V
PWR(UV)
), the outputs will turn off, FSB will
go to logic [0], and the fault register UV bit will be set to [1].
Two cases need to be considered when the battery level recovers (V
PWR
> V
PWR(UV)_UP
):
If outputs command are low, FSB will go to logic [1] but the UV bit will remain set to 1 until the next read operation (warning
report).
If the output command is ON, FSB will remain at logic [0]. To delatch the fault and be able to turn ON again the outputs, the
failure condition must disappear and the auto-retry circuitry must be active or the corresponding output must be commanded
OFF and then ON (toggling fault_control signal of corresponding output) or V
SUPPLY(POR)
condition if V
DD
= 0.
In extended mode, the output is protected by overtemperature shutdown circuitry. All previous latched faults, occurred when
V
PWR
was within the normal voltage range, are guaranteed if V
DD
is within the operational voltage range or until V
SUPPLY(POR)
if
VDD = 0. Any new OT fault is detected (VDD failure included) and reported through SPI above VPWR
(UV)
. The output state is
not changed as long as the V
PWR
voltage does not drop any lower than 3.5 V typical.
All latched faults (overtemperature, overcurrent, severe short-circuit, over and undervoltage) are reset if:
•V
DD
< V
DD(FAIL)
with V
PWR
in nominal voltage range,
•V
DD
and V
PWR
supplies is below V
SUPPLY(POR)
voltage value.
Over-current thresholds
toff
depending to toff
Cooling
PWM
hson signal
fault_control
hson
Depending on toff