Datasheet

9397 750 13815 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 12 November 2004 9 of 21
Philips Semiconductors
74HC73
Dual JK flip-flop with reset; negative-edge trigger
11. Dynamic characteristics
Table 8: Dynamic characteristics
GND = 0 V; t
r
=t
f
= 6 ns; C
L
= 50 pF; see Figure 8.
Symbol Parameter Conditions Min Typ Max Unit
T
amb
= 25 °C
t
PHL
, t
PLH
propagation delay nCP to nQ see Figure 6
V
CC
= 2.0 V - 52 160 ns
V
CC
= 4.5 V - 19 32 ns
V
CC
= 6.0 V - 15 27 ns
V
CC
= 5.0 V; C
L
=15pF - 16 - ns
propagation delay n
CP to nQ see Figure 6
V
CC
= 2.0 V - 52 160 ns
V
CC
= 4.5 V - 19 32 ns
V
CC
= 6.0 V - 15 27 ns
V
CC
= 5.0 V; C
L
=15pF - 16 - ns
propagation delay n
R to nQ, nQ see Figure 7
V
CC
= 2.0 V - 50 145 ns
V
CC
= 4.5 V - 18 29 ns
V
CC
= 6.0 V - 14 25 ns
V
CC
= 5.0 V; C
L
=15pF - 15 - ns
t
THL
, t
TLH
output transition time see Figure 6
V
CC
= 2.0 V - 19 75 ns
V
CC
= 4.5 V - 7 15 ns
V
CC
= 6.0 V - 6 13 ns
t
W
nCP clock pulse width HIGH or LOW see Figure 6
V
CC
= 2.0 V 80 22 - ns
V
CC
= 4.5 V 16 8 - ns
V
CC
= 6.0 V 14 6 - ns
n
R reset pulse width HIGH or LOW see Figure 7
V
CC
= 2.0 V 80 22 - ns
V
CC
= 4.5 V 16 8 - ns
V
CC
= 6.0 V 14 6 - ns
t
rem
removal time nR to nCP see Figure 7
V
CC
= 2.0 V 80 22 - ns
V
CC
= 4.5 V 16 8 - ns
V
CC
= 6.0 V 14 6 - ns
t
su
set-up time nJ, nK to nCP see Figure 6
V
CC
= 2.0 V 80 22 - ns
V
CC
= 4.5 V 16 8 - ns
V
CC
= 6.0 V 14 6 - ns