Datasheet

Table 28. Reset sources
Reset source Reset reason Actions taken
Power ON / power
failure
Initialization after a power cycle All the onboard devices are reset after a power cycle. PLL
and clock circuitry initialize to default configuration.
SW6 Reset switch is pressed All devices are reset
RESET_REQ_B
1
Reset request from processor All devices are reset
CPU JTAG header
(J15)
Reset JTAG debugger PORESET is asserted to the processor
1. RESET_REQ_B only works when a jumper is placed on header J14.
System reset
Layerscape FRWY-LS1046A Board Reference Manual, Rev. 0, 26 April 2019
NXP Semiconductors
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