Datasheet

Table 3. FRWY-LS1046A features (continued)
Board feature Processor feature used Description
Power supply
12 V input power from DC input adapter
1/0.9 V for core VDD, USB_SVDD, USB_SDVDD, and
SVDD
1.2 V for DDR4 G1VDD
0.6 V for DDR4 VTT/VREF
2.5 V for DDR4 VPP
3.3 V for DVDD
3.3 V for EVDD
3.3 V for USB_HVDD
1.8 V for OVDD and LVDD
1.35 V for XVDD
2.5 V for TVDD
1.8 V / GND for TA_PROG_SFP (GPIO-controlled)
1/0.9 V for TA_BB_VDD
2.5 V for QSGMII PHY VDD25, VDD25A
2.1 V for QSGMII PHY core
3.3 V for M.2 Key-E slots
5 V for USB port
5 V and 3.3 V for mikroBUS socket
Clock
SYSCLK:
Supports single-ended SYSCLK and DDRCLK clock
input = 100 MHz (fixed)
Supports single-source differential DIFF_SYCLK = 100
MHz (fixed)
SerDes:
Provides clocks to all SerDes blocks and slots
100 MHz for SD1_REF_CLK2
100 MHz for SD2_REF_CLK1 and SD2_REF_CLK2
100 MHz for M.2 Key-E slots M2_1_REFCLK and
M2_2_REFCLK
RTC:
Supports 32.768 kHz for LS1046A RTC
Ethernet:
Supports differential 125 MHz for F104S8A QSGMII PHY
Table continues on the next page...
Board features
Layerscape FRWY-LS1046A Board Reference Manual, Rev. 0, 26 April 2019
NXP Semiconductors
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