Datasheet

i.MX 6Dual/6Quad Applications Processors for Industrial Products, Rev. 6, 11/2018
156 NXP Semiconductors
Revision History
7 Revision History
Table 90 provides a revision history for the i.MX 6Dual/6Quad data sheet.
Table 90. i.MX 6Dual/6Quad Data Sheet Document Revision History
Rev.
Number
Date Substantive Change(s)
6 10/2018 Revision 6 changes:
• Table 20, “XTALI and RTC_XTALI DC Parameters,” on page 37,
– Row: XTALI input leakage current at startup, I
XTALI_STARTUP
: Changed from “... driven 32 KHz RTC
clock @ 1.1V” to “...driven 24 MHz clock at 1.1V.”
• Table 47, “eMMC4.4/4.41 Interface Timing Specification,” on page 77,
– Row: SD2, uSDHC Output Delay: Changed t
OD
from 2.5 ns minimum to 2.8 ns and 7.1 ns maximum
to 6.8 ns.
(Revision History table continues on next page.)