Datasheet

i.MX 6Dual/6Quad Applications Processors for Industrial Products, Rev. 6, 11/2018
160 NXP Semiconductors
Revision History
Rev. 3 02/2014 • Updates throughout for Silicon revision D, include:
- Figure 1 Part number nomenclature diagram.
- Example Orderable Part Number tables, Table 1
• Feature description for Miscellaneous IPs and interfaces; SSI and ESAI.
• Table 6, UART 1–5 description change: programmable baud rate up to 5 MHz.
• Table 6, uSDHC 1–4 description change: including SDXC cards up to 2 TB.
• Table 6, operating range for Run mode: LDO bypassed, minimum value corrected to 1.150 V.
• Table 6, table footnotes, added LDO enabled mode footnote for internal LDO output set points.
• Table 61, added table footnote to the Comment heading in the Comment column.
• Removed table “On-Chip LDOs and their On-Chip Loads.”
• Section 4.1.4, External Clock Sources; added Note, “The internal RTC oscillator does not …”.
• Section 4.1.5, reworded second paragraph about the power management IC to explain that a robust
thermal design is required for the increased system power dissipation.
• Table 8, Maximum Supply Currents: NVCC_RGMII Condition value changed to N=6.
• Table 8, Maximum Supply currents: Added row; NVCC_LVDS2P5
• Section 4.2.1 Power-Up Sequence: reworded third bulleted item regarding POR control.
• Section 4.2.1 Power-Up Sequence: removed Note.
• Section 4.5.2 OSC32K, second paragraph reworded to describe OSC32K automatic switching.
• Section 4.5.2 OSC32K, added Note following second paragraph to caution use of internal oscillator use.
• Table 20 XTALI and RTC_XTALI DC parameters; changed RTC_XTALI Vih minimum value to 0.8.
• Table 20 XTALI and RTC_XTALI DC parameters; changed RTC_XTALI Vih maximum value to 1.1.
• Table 34 Reset Timing Parameters; removed footnote.
• Section 4.9.3 External Interface Module; enhanced wording to first paragraph to describe operating
frequency for data transfers, and to explain register settings are valid for entire range of frequencies.
• Table 37. EIM Bus Timing Parameters; reworded footnotes for clarity.
• Table 38. EIM Asynchronous Timing Parameters; removed comment from the Max heading cell.
• Table 38. EIM Asynchronous Timing Parameters; reworded footnote 2 for clarity.
• Table 53. RMII Signal Timing; parameter M19 Max value relaxed to 13.5 ns.
• Table 95. Corrected the ALT5 Default Function names.
• Figure 96 and Figure 97 21 x 21 mm Lidded Package; updated drawing (Rev D).
Rev. 2.3 07/26
/2013
• Table 95, 21 x 21Functional Contact Assignments:
Restored NANDF_WP_B row and description.
• System Timing Parameters Table 34, Reset timing parameter, CC1 description clarified, change from:
“Duration of SRC_POR_B to be qualified as valid (input slope <= 5 ns)” to:
“Duration of SRC_POR_B to be qualified as valid”
and added a footnote to the parameter with the following text:
“SRC_POR_B rise and fall times must be 5 ns or less.”
This change was made for clarity and does not represent a specification change.
Rev. 2.2 07/2013 • Editor corrections to revision history links. No technical content changes.
Rev. 2.1 07/2013 • Figure 1, Changed temperature references from Consumer to Commercial.
• Table 95, 21 x 21Functional Contact Assignments:
—Removed rows: DRAM_VREF, HDMI_DDCCEC, and HDMI_REF.
—Due to a typographical error in revision 2.0, the ball names for rows EIM_DA2 through EIM_DA15 were
ordered incorrectly. This has been corrected in revision 2.1. The ball map is correct in both revision 2.0
and 2.1.
(Revision History table continues on next page.)
Table 90. i.MX 6Dual/6Quad Data Sheet Document Revision History (continued)
Rev.
Number
Date Substantive Change(s)