Datasheet

i.MX 6Dual/6Quad Applications Processors for Industrial Products, Rev. 6, 11/2018
20 NXP Semiconductors
Electrical Characteristics
4.1.2 Thermal Resistance
NOTE
Per JEDEC JESD51-2, the intent of thermal resistance measurements is
solely for a thermal performance comparison of one package to another in a
standardized environment. This methodology is not meant to and will not
predict the performance of a package in an application-specific
environment.
4.1.2.1 FCPBGA Package Thermal Resistance
Table 5 provides the FCPBGA package thermal resistance data.
Table 5. FCPBGA Package Thermal Resistance Data
Thermal Parameter Test Conditions Symbol
Value
Unit
No Lid Lid
Junction to Ambient
1
1
Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)
temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal
resistance.
Single-layer board (1s); natural convection
2
2
Per JEDEC JESD51-3 with the single layer board horizontal. Thermal test board meets JEDEC specification for the specified
package.
R
θJA
31 24 °C/W
Four-layer board (2s2p); natural convection
2
R
θJA
22 15 °C/W
Junction to Ambient
1
Single-layer board (1s); air flow 200 ft/min
3
3
Per JEDEC JESD51-6 with the board horizontal.
R
θJMA
24 17 °C/W
Four-layer board (2s2p); air flow 200 ft/min
3
R
θJMA
18 12 °C/W
Junction to Board
1,4
4
Thermal resistance between the die and the printed circuit board per JEDEC JESD51-8. Board temperature is measured on
the top surface of the board near the package.
—R
θJB
12 5 °C/W
Junction to Case (top)
1,5
5
Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method
1012.1). The cold plate temperature is used for the case temperature. Reported value includes the thermal resistance of the
interface layer.
—R
θJCtop
<0.1 1 °C/W