Datasheet

i.MX 6Dual/6Quad Applications Processors for Industrial Products, Rev. 6, 11/2018
88 NXP Semiconductors
Electrical Characteristics
Figure 54. Inter-Pair Skew Definition
Figure 55. TMDS Output Signals Rise and Fall Time Definition
Table 56. Switching Characteristics
Symbol Parameter Conditions Min Typ Max Unit
TMDS Drivers Specifications
— Maximum serial data rate — — — 3.4 Gbps
F
TMDSCLK
TMDSCLK frequency On TMDSCLKP/N outputs 25 — 340 MHz
P
TMDSCLK
TMDSCLK period RL = 50 Ω
See Figure 51.
2.94 — 40 ns
t
CDC
TMDSCLK duty cycle
t
CDC
= t
CPH
/ P
TMDSCLK
RL = 50 Ω
See Figure 51.
40 50 60 %
t
CPH
TMDSCLK high time RL = 50 Ω
See Figure 51.
456UI
t
CPL
TMDSCLK low time RL = 50 Ω
See Figure 51.
456UI
— TMDSCLK jitter
1
RL = 50 Ω — — 0.25 UI
t
SK(p)
Intra-pair (pulse) skew RL = 50 Ω
See Figure 53.
— — 0.15 UI
t
SK(pp)
Inter-pair skew RL = 50 Ω
See Figure 54.
——1UI
t
R
Differential output signal rise
time
20–80%
RL = 50 Ω
See Figure 55.
75 — 0.4 UI ps