Datasheet

i.MX 6DualPlus/6QuadPlus Automotive Applications Processors, Rev. 3, 11/2018
42 NXP Semiconductors
Electrical Characteristics
4.6.4.1 LPDDR2 Mode I/O DC Parameters
For details on supported DDR memory configurations, see Section 4.10.2, “MMDC Supported
DDR3/DDR3L/LPDDR2 Configurations.”
The parameters in Table 24 are guaranteed per the operating ranges in Table 6, unless otherwise noted.
4.6.4.2 DDR3/DDR3L Mode I/O DC Parameters
For details on supported DDR memory configurations, see Section 4.10.2, “MMDC Supported
DDR3/DDR3L/LPDDR2 Configurations.”
The parameters in Table 25 are guaranteed per the operating ranges in Table 6, unless otherwise noted.
Table 24. LPDDR2 I/O DC Electrical Parameters
1
1
Note that the JEDEC LPDDR2 specification (JESD209_2B) supersedes any specification in this document.
Parameters Symbol Test Conditions Min Max Unit
High-level output voltage Voh Ioh = -0.1 mA 0.9 × OVDD — V
Low-level output voltage Vol Iol = 0.1 mA — 0.1 × OVDD V
Input reference voltage Vref — 0.49 × OVDD 0.51 × OVDD
DC input High Voltage Vih(dc) — Vref+0.13V OVDD V
DC input Low Voltage Vil(dc) — OVSS Vref-0.13V V
Differential Input Logic High Vih(diff) — 0.26 See Note
2
2
The single-ended signals need to be within the respective limits (Vih(dc) max, Vil(dc) min) for single-ended signals as well as
the limitations for overshoot and undershoot (see Table 30).
—
Differential Input Logic Low Vil(diff) — See Note
2
-0.26 —
Input current (no pull-up/down) Iin Vin = 0 or OVDD -2.5 2.5 μA
Pull-up/pull-down impedance mismatch MMpupd — -15 +15 %
240 Ω unit calibration resolution Rres — — 10 Ω
Keeper circuit resistance Rkeep — 110 175 kΩ
Table 25. DDR3/DDR3L I/O DC Electrical Parameters
Parameters Symbol Test Conditions Min Max Unit
High-level output voltage
Voh
Ioh = -0.1 mA
Voh (DSE = 001)
0.8 × OVDD
1
—V
Ioh = -1 mA
Voh (for all except DSE = 001)
Low-level output voltage
Vol
Iol = 0.1 mA
Vol (DSE = 001)
—0.2× OVDD V
Iol = 1 mA
Vol (for all except DSE = 001)
Input reference voltage Vref
2
—0.49× OVDD 0.51 × OVDD