UM11183 KITFS85SKTEVM evaluation board Rev. 3 — 6 December 2019 User manual Figure 1. KITFS85SKTEVM Important Notice NXP provides the enclosed product(s) under the following conditions: This evaluation kit is intended for use of ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY. It is provided as a sample IC pre-soldered to a printed circuit board to make it easier to access inputs, outputs, and supply terminals.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board 1 Introduction This document is the user guide for the KITFS85SKTEVM evaluation board. This document is intended for the engineers involved in the evaluation, design, implementation, and validation of FS8500 Fail-safe system basis chip with multiple SMPS and LDO. The scope of this document is to provide the user with information to evaluate the FS8500 Fail-safe system basis chip with multiple SMPS and LDO.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board 3.2 Additional hardware In addition to the kit contents, the following hardware is necessary or beneficial when working with this kit. • Power supply with a range of 8.0 V to 60 V and a current limit set initially to 1.0 A 3.3 Windows PC workstation This evaluation board requires a Windows PC workstation. Meeting these minimum specifications should produce great results when working with this evaluation board.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board generates the OTP programming voltage (8.0 V) without any need for an external power supply. 4.1.1 KITFS85SKTEVM features • • • • • • • • • • • • • VBAT power supply connectors (Jack and Phoenix) VPRE output capability up to 1.0 A (socket limit) VBUCK1/2 in Standalone (default) or Multiphase mode VBUCK3 VBOOST 5.0 V or 5.74 V LDO1 and LDO2, from 1.1 V to 5.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board R181 68.1 kΩ VPRE R191 22.1 kΩ 3 2 J22 GND R180 27.4 kΩ BUCK2 3 2 J23 R178 68.1 kΩ VMON_08V HDR 1X3 R189 22.1 kΩ 3 2 J24 R182 68.1 kΩ BUCK3_MON3 1 GND VMON_08V HDR 1X3 R192 22.1 kΩ 3 2 J21 R207 115 kΩ HDR 1X3 R208 22.1 kΩ LDO_MON4 1 GND LDO2 BUCK2_MON2 1 GND LDO1 VMON_08V HDR 1X3 R190 22.1 kΩ BUCK3 VPRE_MON1 1 R217 0Ω DNP VMON_08V GND aaa-032765 Figure 2. VMONx configuration 4.1.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board Table 1. Compensation network Components VPRE 450 kHz VPRE 2.2 MHz C18/C19 6.8 nF 1.5 nF C14/C15 150 pF 22 pF R6/R10 3.57 kΩ 16.9 kΩ LPRE 4.7 µH or 6.8 µH 1.5 µH, 2.2 µH or 4.7 µH 4.1.4 BUCK1 and BUCK2 multiphase configuration The board is designed to work independently with BUCK1 and BUCK2. Due to R11 and R145, it is possible to connect both connectors together and work in multiphase.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board J30 WAKE1 1 VDDI2C 3 2 4 MISO I2C_SDA 5 6 SCLK I2C_SCL 7 8 CSB VDDIO_EXT 9 10 DBG 11 12 13 14 15 16 MOSI VSUP GND GND aaa-032822 Figure 6. J30 SPI connection 4.1.6 VDDI2C As an option, an external LDO is provided to feed VDDI2C. This LDO can also be used to feed VDDIO, which is the default implementation. The I2C is compatible with 1.8 V or 3.3 V, while VDDIO is compatible with 3.3 V and 5.0 V.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board 4.2 Device OTP user configuration It is recommended to learn about OTP before operating with the device. The device has a high level of flexibility due to parameter configuration available in the OTP. This impacts the functionality of the device. It is key to understand how OTP parameters can be programmed, the interaction with mirror registers and the FS85 SoC.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board Figure 10 shows the sequence to be followed to enter in Debug mode. The voltage sequence on the kit is done using switches installed on the board, while the OTP registers configuration is managed by the FlexGUI GUI. This is described in detail in the following sections. VDBG DBG > VSUP_UVH VSUP1/2 > WAKE12VIH WAKE1 SPI/I2C SPI/I2C OTP pgm REGx SPI/I2C OFF PWR UP ON aaa-031966 Figure 10.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board 1. VBAT Jack connector 2. VBAT three position switch 3. VBAT Phoenix connector 4. LDO1/LDO2 power supplies 5. VPRE power supply 6. BUCK1/BUCK2 power supply 7. USB connector (for FlexGUI control) 8. Debug connectivity 9. Programming 10. Wake1 switch 11. OTP burning voltage switch 12. VBOOST and BUCK3 power supply 13. DEBUG voltage source 14. Compensation network selection 15. VDDIO selection 16. SPI / RSTB / FS0B connection to MCU 17.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board Number Description 8 Debug connectivity. Access to: • VSUP, GND • FOUT/FIN • PGOOD/RSTB/FS0B • FCCUx • WAKE2 • PSYNC, ERRMON, AMUX • VMONx 9 Programming • SPI bus • I2C bus • Debug pin • VPRE, VSUP, GND 10 Wake1 switch 11 OTP burning voltage switch 12 VBOOST and BUCK3 power supply 13 DEBUG voltage source either from USB (recommended) or from VSUP 14 VPRE compensation network selection, either 2.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board • Based on part number: low voltage integrated synchronous BUCK2 converter. Configurable output voltage and current capability up to 3.6 A peak. Multi-phase capability with BUCK1 to extend the current capability up to 7.2 A peak on a single rail. Static voltage scaling capability. • Based on part number: low voltage integrated synchronous BUCK3 converter. Configurable output voltage and current capability up to 2.5 A typical peak.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board Label Name Color Description D4 BUCK1 Green BUCK1 On D6 BUCK2 Green BUCK2 On D7 BUCK3 Green BUCK3 On D8 VBOOST Green VBOOST On D9 VPRE Green VPRE On D12 DBG > 8.0 V Blue DBG pin voltage > 8.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board 4.3.3.2 Output power supply connectors Table 5. BUCK1/BUCK2 connector (J14) Schematic label Signal name Description J14-1 BUCK2 BUCK2 power supply output J14-2 BUCK1 BUCK1 power supply output J14-3 GND Ground Table 6. VBOOST/BUCK3 connector (J16) Schematic label Signal name Description J16-1 VBOOST VBOOST output J16-2 BUCK3 BUCK3 power supply output J16-3 GND Ground Table 7.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board Schematic label Signal name Description J29-14 PSYNC Power synchronization J29-15 VDDIO VDDIO used by FS85 J29-16 WAKE2_IN Wake2 input J29-17 FCCU1 Fault collector control unit 1 J29-18 VSUP VSUP power supply J29-19 FCCU2 Fault collector control unit 2 J29-20 GND Ground 4.3.3.4 Program connector (J30) Table 10.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board Figure 15. Evaluation board test points Table 11.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board 4.3.5 Jumpers Figure 16. Evaluation board jumper locations Table 12. Evaluation board jumper descriptions Name Function J5 VBAT shunt J6 VSUP shunt J8 BUCK3 input J9 LDO1 input J10 VBAT jack J11 UM11183 User manual VDDIO selection J17 Debug J20 VMON4 J22 VMON1 Pin number Jumper/pin function 1−2 Shunt switch SW1 for current > 5.0 A 3−4 Shunt switch SW1 for current > 5.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board Name Function J23 VMON2 J24 VMON3 Pin number Jumper/pin function 1−2 VMON2 tied to 0.8 V 2−3 VMON2 tied to BUCK2 1−2 VMON3 tied to 0.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board Table 14. SW2 Position Function Description OFF WAKE1 open Wake1 pin not connected to VSUP ON WAKE1 closed Wake1 pin connected to VSUP Position Function Description TOP VBAT On VBAT from J1 MIDDLE VBAT Off Board not supplied BOTTOM VBAT On VBAT from J10 Table 15. SW1 4.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board 4. In the SECON FLEX GUI SLAVE Properties window, click Update Driver. UM11183 User manual All information provided in this document is subject to legal disclaimers. Rev. 3 — 6 December 2019 © NXP B.V. 2019. All rights reserved.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board 5. in the Update Software Driver window, select Browse my computer for driver software. UM11183 User manual All information provided in this document is subject to legal disclaimers. Rev. 3 — 6 December 2019 © NXP B.V. 2019. All rights reserved.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board 6. Select Let me pick from a list of device drivers on my computer, and then click Next. 7. Select Ports (COM & LPT) from the list, and then click Next. 8. Click Have Disk. UM11183 User manual All information provided in this document is subject to legal disclaimers. Rev. 3 — 6 December 2019 © NXP B.V. 2019. All rights reserved.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board 9. Click Browse. 10.In the Locate File window, locate and select fsl_ucwxp, and then click Open. UM11183 User manual All information provided in this document is subject to legal disclaimers. Rev. 3 — 6 December 2019 © NXP B.V. 2019. All rights reserved.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board 11.In the Install from Disk window, click OK. 12.If prompted, in the Windows Security window, click Select this driver software anyway. UM11183 User manual All information provided in this document is subject to legal disclaimers. Rev. 3 — 6 December 2019 © NXP B.V. 2019. All rights reserved.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board 13.Close the window when the installation is complete. 14.In the Virtual Com Port Properties window, verify that the device is working properly, and then click Close. UM11183 User manual All information provided in this document is subject to legal disclaimers. Rev. 3 — 6 December 2019 © NXP B.V. 2019. All rights reserved.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board The Virtual Com Port appears in the Device Manager window. UM11183 User manual All information provided in this document is subject to legal disclaimers. Rev. 3 — 6 December 2019 © NXP B.V. 2019. All rights reserved.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board 5.3 Installing FlexGUI software package The FlexGUI software installation requires only extracting the zip file in a desired location. 1. If necessary, install the Java JRE and Windows 7 FlexGUI driver. 2. Download the latest FlexGUI (32-bit or 64-bit) version, available at http:// www.nxp.com/KITFS85SKTEVM. 3. Extract all the files to a desired location on your PC. FlexGUI is started by running the batch file, \bin\flexgui-app-fs85.bat.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board 6 Configuring the hardware for startup Figure 18. Typical initial configuration Figure 18 presents a typical hardware configuration incorporating the development board, power supply and Windows PC workstation. To configure the hardware and workstation as illustrated in Figure 18, complete the following procedure: 1. Install jumpers for the configuration. Table 16. Jumper configuration Jumper Configuration J17 connect 1-2 (connect 5.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board 7 Using the KITFS85SKTEVM evaluation board This section summarizes the overall setup. Detailed description is provided in the following sections. Before starting the process, choose the mode you want to run the device. • In Normal mode, the configuration comes from OTP fuses. • In Debug mode, you can either use the current configuration from OTP fuse, if any, or use the OTP emulation mode to write in the mirror register.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board Figure 20. OTP_conf_failsafe_reg spreadsheet example 3. See the OTP_conf_summary sheet to review the complete configuration (main and fail-safe). Figure 21. OTP_conf_summary example 4. Generate script in the OTP_conf_file_generation sheet. Once the configuration is ready, the user can generate the script file. Go to OTP_conf_file_generation, enter the path in the File repository, and then click Write_OTP_File_GUI.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board Figure 22. OTP script generation 7.2 Working in OTP emulation mode At startup, the device always uses the content from the mirror register. This content can come from OTP fuse or from configuration written directly in the mirror register. OTP emulation means that the user can emulate the OTP writing in the mirror register. This allows trials before burning the OTP. 1. Configure the hardware. See Section 6 "Configuring the hardware for startup".
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board 7.2.1 Example script: Closing initialization phase, disabling FCCU monitoring and releasing FS0B The following script can be used to: • Disable the WD (simple WD configuration is used here). • Disable the FCCU monitoring. On the hardware kit, the FCCU1 is pulled to GND and FCCU2 is pulled to VDDIO, which is detected as error phase by default. Disabling the FCCU by SPI/I2C avoids safety issue at startup. • Close the initialization phase.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board 8 Using FlexGUI To follow the steps in this section, make sure that the board is connected using the appropriate hardware configuration (see Section 7.2 "Working in OTP emulation mode"). Note: It is recommended to use the latest version of FlexGUI. 8.1 Starting the FlexGUI application After FlexGUI is launched with the flexgui-app.bat file, the FlexGUI launcher displays available kits. Communication bus, SPI or I2C can be selected at this level.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board When the configuration is selected, click OK. 8.2 Establishing the connection between FlexGUI and the hardware The board must be connected to the USB before establishing a connection. • Click Search to detect the COM port of the board. • Click Start to enable the connection. Figure 24. Main panel Figure 24 shows the mode selection. At first launch, the FlexGUI starts in User mode.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board The current mode is refreshed only when Poll button is activated. If required, this has to be done at start up (Poll button is disabled by default). See Figure 25. Figure 25. Disabling device mode polling To move from one mode to the other, select the mode with switch mode drop-down button. If the requested mode is not confirmed by the device (if debug pin is not set, for instance), the drop-down menu switches back to the previous mode. 8.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board All commands have to follow a specific syntax. The Help menu describes commands available in the script editor and their syntax. Figure 27 shows an example to build a command from the panel. UM11183 User manual All information provided in this document is subject to legal disclaimers. Rev. 3 — 6 December 2019 © NXP B.V. 2019. All rights reserved.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board Figure 27. Build a command The value 0x0800 is sent to the register M_REG_CTRL1 (BUCK2DIS). The user can then send it to the device by clicking the arrow (see Figure 28). Figure 28. Send script Figure 29. Correct format Figure 30. Wrong format (“//” missing in second line) UM11183 User manual All information provided in this document is subject to legal disclaimers. Rev. 3 — 6 December 2019 © NXP B.V. 2019. All rights reserved.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board 8.3.2 Script sequence files The Script editor allows the user to save script sequence files. A script sequence file is text file that contains a set of commands sent to the device in the order they are written, as shown in the following example.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board Figure 31. Register map • Register map: allows access to functional register, safety register and write init register which are accessible only during initialization phase • Read: allows you to read any register either individually or by bank • Write: allows you to write any register either individually or by bank • Register expansion: displays the value of each device parameter 8.4.2 Clocks Figure 32.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board SPI/I2C: • Configure the device to work with FIN input • Select the signal to apply on FOUT pin • Play with manual frequencies and spread spectrum 8.4.3 Regulators The regulator has two main areas: • Low voltage (LV) regulators configuration • VPRE compensation network calculation Each regulator can either be enabled or disabled by SPI/I2C.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board Figure 34. Measurements 8.4.5 Interrupt flags This tab allows you to set or clear flags. It is also possible to mask the interruption. Figure 35. Interrupt flags UM11183 User manual All information provided in this document is subject to legal disclaimers. Rev. 3 — 6 December 2019 © NXP B.V. 2019. All rights reserved.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board 8.4.6 INIT safety This tab allows you to manage all registers that can be configured to close the initialization phase. Note that the initialization phase is closed by the first good watchdog refresh before 256 ms timeout. Figure 36. INIT safety 8.4.7 Diag safety The watchdog type configured in the OTP has to be manually selected in the dropdown list to play with the watchdog features.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board Figure 37. Diag safety The FS_Release_FS0B command calculates and sends the right secure16-bit word to release FS0B. A simplified way to release FS0B after power up is to, first, select the right type of watchdog configured in the OTP, then, hit FS0B Release script button. This sends the right sequence to close the initialization sequence, sets the error counter back to 0, then releases FS0B.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board 8.4.8 OTP programming This tab allows you to burn the OTP using a script generated by the excel file OTP configuration (see Section 7.1 "Generating the OTP configuration file "). Figure 38. OTP burning To set up the hardware before OTP burning, see Section 7.3 "Programming the device with an OTP configuration". See Figure 38 and follow the steps: • Browse and load the script file you want to burn. The program button is then available.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board 8.4.9 TestMode:Sequencer The sequencer allows you to display the slot configuration for the device. To be able to access this tab, the device has to be in Test mode. The configuration is read from mirror register. It is possible to modify it and update the mirror register. As an example, the slot sequence is filled at start up with the content of OTP fuses. Then the user can decide to modify any of the configurations coming from the OTP fuse.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board 8.4.10 TestMode:Mirrors_Main and TestMode:Mirrors_Failsafe The TestModeMirrors_Main and TestModeMirrors_FailSafe tabs allow access to the OTP main mirrors and fail-safe registers. These tabs are available in Test mode. Figure 41. TestMode: Mirrors_Main UM11183 User manual All information provided in this document is subject to legal disclaimers. Rev. 3 — 6 December 2019 © NXP B.V. 2019. All rights reserved.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board Figure 42. TestMode: Mirrors_FailSafe The Read button provides the current status. The Write button changes the configuration in mirror register. This can be useful, for example, to modify few parameters from OTP fuse to start up the board. 9 References [1] KITFS85SKTEVM — detailed information on this board, including documentation, downloads, and software and tools http://www.nxp.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board 10 Revision history Revision history Rev Date Description v.3 20191206 • • • • • • • • • Section 8.1: updated Figure 23 Section 8.2: updated description and Figure 24 Section 8.3: updated Figure 26 Section 8.3.1: updated Figure 28 Section 8.4.1: updated Figure 31 Section 8.4.2: updated Figure 32 Section 8.4.6: updated Figure 36 Section 8.4.3: updated Figure 33 Section 8.4.10: updated Figure 41 v.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board 11 Legal information default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. 11.1 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions.
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board Tables Tab. 1. Tab. 2. Tab. 3. Tab. 4. Tab. 5. Tab. 6. Tab. 7. Tab. 8. Tab. 9. Compensation network ......................................6 Evaluation board board component descriptions ..................................................... 10 Evaluation board indicator descriptions ...........12 VBAT Phoenix connector (J1) .........................13 BUCK1/BUCK2 connector (J14) ..................... 14 VBOOST/BUCK3 connector (J16) ...............
UM11183 NXP Semiconductors KITFS85SKTEVM evaluation board Contents 1 2 2.1 3 3.1 3.2 3.3 3.4 4 4.1 4.1.1 4.1.2 4.1.3 4.1.4 4.1.5 4.1.6 4.2 4.2.1 4.2.2 4.3 4.3.1 4.3.1.1 4.3.1.2 4.3.2 4.3.3 4.3.3.1 4.3.3.2 4.3.3.3 4.3.3.4 4.3.4 4.3.5 4.3.6 4.4 5 5.1 5.2 5.3 6 7 7.1 7.2 7.2.1 7.3 8 8.1 Introduction ......................................................... 2 Finding kit resources and information on the NXP web site ................................................ 2 Collaborate in the NXP community ........