Datasheet

NXP Semiconductors
UM11183
KITFS85SKTEVM evaluation board
UM11183 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2019. All rights reserved.
User manual Rev. 3 — 6 December 2019
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aaa-032822
21
43
65
87
109
1211
1413
16
MOSI
MISO
SCLK
CSB
VSUP
GND
15
WAKE1
J30
VDDI2C
I2C_SDA
I2C_SCL
VDDIO_EXT
DBG
GND
Figure 6. J30 SPI connection
4.1.6 VDDI2C
As an option, an external LDO is provided to feed VDDI2C. This LDO can also be used to
feed VDDIO, which is the default implementation.
The I2C is compatible with 1.8 V or 3.3 V, while VDDIO is compatible with 3.3 V and
5.0 V. For this reason, the LDO default configuration is 3.3 V. The LDO is supplied by
5.0 V coming from the USB.
a
a
a
-
0
3
2
7
6
9
2
4
6
8
10
LDO1
LDO2
VDDI2C
BUCK3
VDDIO_EXT
P3V3_KL25Z
DNP
R4
0 Ω
VDDIO
selection
VDDIO
1
J11
3
5
7
9
Figure 7. VDDIO selection
a
a
a
-
0
3
2
7
7
0
GND
IN
EN
OUT
MIC5235YM5
VDDI2C
ADJ
1
U1
3
5
4
2
GND
GND
GND
VDDI2C_SEL
P5V0_USB
C145
1.0 µF
C137
2.2 µF
J20
1.8 V3.3 V
123
R21
52.3 kΩ
R15
191 kΩ
R193
115 kΩ
Figure 8. VDDI2C supply