Datasheet
UBA20260 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 2 — 10 October 2011 12 of 30
NXP Semiconductors
UBA20260
600 V driver IC for step dimmable CFLs
7.3.2 Combined timing circuit
A combined timing circuit is used to determine the preheat time, ignition enabling time and
overcurrent time (see Figure 9
). C
CP
, R
ext(RREF)
and the counter comprise the clock
generator circuit. When the timer is not running, C
CP
is charged to 5 V. The timing circuit
starts operating after the start-up state when the V
DD
supply voltage has reached V
DD(start)
and the voltage on the CP pin passes V
th(CP)max
. The preheat time consists of eight
saw-tooth pulses on the CP pin as shown in Figure 9
.
The maximum ignition enabling time after the preheat phase is two complete saw-tooth
pulses. During the boost and burn state, part of the timer is used to generate the
maximum overcurrent time (more than one half of the saw-tooth pulse). If a continuous
overcurrent is detected, the timer starts.
7.4 Step dimming
The UBA20260 uses the step dimming method of dimming a lamp load. This method
enables the lamp to operate in four different light output level modes including full power.
The four different dim level modes can be selected by toggling the supply voltage which is
made possible by toggling the mains voltage switch.
To change the dim step, the low supply voltage must be above V
DD(start)
. In addition, the
voltage must drop below V
DD(rst)
, irrespective of whether the IC is in the preheat, ignition,
boost or burn states (see Figure 10
).
The discharge time of capacitor C
CP
(while the V
DD
power supply is off) sets step memory
retention time. When the voltage on the CP pin drops below V
ret(dim)CP
(2 V typical), the
step memory is lost. The next time the supply is powered on, the lamp turns on at full
brightness. Using the default components, the retention time is 3 s. The retention time
calculation can be found in Section 11 on page 22
.
Fig 9. Timing diagram for preheat, ignition and overcurrent
001aam768
voltage
(V)
5 V
0 V
4.5 V
3.8 V
V
CP
startup
time
preheat time boost-burn power down
overcurrent
fault time
CFL ignition
ignition
time
ignition
enabling time
time (s)
V
th(CP)max
V
th(CP)min










