Datasheet

ManualsBrandsON SEMICONDUCTOR ManualsLinear ICsLinear IC - Op-amp Multi-purpose PDIP 14

 Semiconductor Components Industries, LLC, 2002

January, 2002 – Rev. 5

1 Publication Order Number:

MC34071/D

MC34071,2,4,A

MC33071,2,4,A

Single Supply 3.0 V to 44 V

Operational Amplifiers

Quality bipolar fabrication with innovative design concepts are

employed for the MC33071/72/74, MC34071/72/74 series of

monolithic operational amplifiers. This series of operational

amplifiers offer 4.5 MHz of gain bandwidth product, 13 V/µs slew rate

and fast settling time without the use of JFET device technology.

Although this series can be operated from split supplies, it is

particularly suited for single supply operation, since the common

mode input voltage range includes ground potential (V

). With a

Darlington input stage, this series exhibits high input resistance, low

input offset voltage and high gain. The all NPN output stage,

characterized by no deadband crossover distortion and large output

voltage swing, provides high capacitance drive capability, excellent

phase and gain margins, low open loop high frequency output

impedance and symmetrical source/sink AC frequency response.

The MC33071/72/74, MC34071/72/74 series of devices are

available in standard or prime performance (A Suffix) grades and are

specified over the commercial, industrial/vehicular or military

temperature ranges. The complete series of single, dual and quad

operational amplifiers are available in plastic DIP, SOIC and TSSOP

surface mount packages.

• Wide Bandwidth: 4.5 MHz

• High Slew Rate: 13 V/µs

• Fast Settling Time: 1.1 µs to 0.1%

• Wide Single Supply Operation: 3.0 V to 44 V

• Wide Input Common Mode Voltage Range: Includes Ground (V

EE)

• Low Input Offset Voltage: 3.0 mV Maximum (A Suffix)

• Large Output Voltage Swing: –14.7 V to +14 V (with ±15 V

Supplies)

• Large Capacitance Drive Capability: 0 pF to 10,000 pF

• Low Total Harmonic Distortion: 0.02%

• Excellent Phase Margin: 60°

• Excellent Gain Margin: 12 dB

• Output Short Circuit Protection

• ESD Diodes/Clamps Provide Input Protection for Dual and Quad

http://onsemi.com

See detailed ordering and shipping information in the package

dimensions section on page 17 of this data sheet.

ORDERING INFORMATION

PDIP–8

P SUFFIX

CASE 626

SO–8

D SUFFIX

CASE 751

PDIP–14

P SUFFIX

CASE 646

SO–14

D SUFFIX

CASE 751A

TSSOP–14

DTB SUFFIX

CASE 948G

See general marking information in the device marking

section on page 18 of this data sheet.

DEVICE MARKING INFORMATION

http://onsemi.com

Summary of content (24 pages)

PAGE 1
MC34071,2,4,A MC33071,2,4,A Single Supply 3.0 V to 44 V Operational Amplifiers Quality bipolar fabrication with innovative design concepts are employed for the MC33071/72/74, MC34071/72/74 series of monolithic operational amplifiers. This series of operational amplifiers offer 4.5 MHz of gain bandwidth product, 13 V/µs slew rate and fast settling time without the use of JFET device technology.
PAGE 2
MC34071,2,4,A MC33071,2,4,A PIN CONNECTIONS CASE 646/CASE 751A/CASE 948G CASE 626/CASE 751 Offset Null Inputs VEE 1 8 NC 2 - 7 VCC 3 + 6 Output 5 Offset Null 4 Output 1 Inputs 1 1 8 2 Inputs 1 VEE 7 + 3 + VCC 4 Inputs 2 VCC Output 2 6 5 14 2 13 + 3 (Single, Top View) Output 1 1 Output 2 4 1 + 12 4 11 5 + - 6 2 3 10 + - 9 7 8 Inputs 2 Output 4 Inputs 4 VEE Inputs 3 Output 3 (Quad, Top View) (Dual, Top View) VCC Q3 Q1 Q4 Q6 Q5 Q7 Q17 Q2 R1 Bias
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MC34071,2,4,A MC33071,2,4,A ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = –15 V, RL = connected to ground, unless otherwise noted. See Note 3 for TA = Tlow to Thigh) A Suffix Characteristics Symbol Input Offset Voltage (RS = 100 Ω, VCM = 0 V, VO = 0 V) VCC = +15 V, VEE = –15 V, TA = +25°C VCC = +5.
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MC34071,2,4,A MC33071,2,4,A AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = –15 V, RL = connected to ground. TA = +25°C, unless otherwise noted.) A Suffix Characteristics Symbol Slew Rate (Vin = –10 V to +10 V, RL = 2.0 kΩ, CL = 500 pF) AV = +1.0 AV = –1.0 Non–Suffix Min Typ Max Min Typ Max 8.0 – 10 13 – – 8.0 – 10 13 – – – – 1.1 2.2 – – – – 1.1 2.2 – – GBW 3.5 4.5 – 3.5 4.5 – MHz BW – 160 – – 160 – kHz – – 60 40 – – – – 60 40 – – – – 12 4.0 – – – – 12 4.
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V IO INPUT OFFSET VOLTAGE (mV) V , 2400 2000 1600 8 & 14 Pin Plastic Pkg SO-14 Pkg 1200 800 400 0 0 20 40 60 80 100 120 140 160 -55 -25 0 25 50 75 100 TA, AMBIENT TEMPERATURE (°C) TA, AMBIENT TEMPERATURE (°C) Figure 4. Maximum Power Dissipation versus Temperature for Package Types Figure 5. Input Offset Voltage versus Temperature for Representative Units VCC VCC VCC/VEE = +1.5 V/ -1.5 V to +22 V/ -22 V VCC -0.8 VCC -1.6 VCC -2.4 VEE +0.
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VCC/VEE = +5.0 V/ -5.0 V to +22 V/ -22 V TA = 25°C VCC VCC -1.0 Source VCC -2.0 VEE +1.0 Sink VEE VCC-2.0 0 5.0 10 15 0.1 Gnd 0 100 20 100 k Figure 10. Single Supply Output Saturation versus Load Resistance to VCC Figure 11. Split Supply Output Saturation versus Load Current I , SC OUTPUT CURRENT (mA) VCC 2.0 VCC = +15 V RL to VCC TA = 25°C 1.0 Gnd 100 Z , Ω O OUTPUT IMPEDANCE ( ) 10 k RL, LOAD RESISTANCE TO GROUND (Ω) -0.8 30 1.0 k IL, LOAD CURRENT (±mA) 60 -0.
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MC34071,2,4,A MC33071,2,4,A THD, TOTAL HARMONIC DISTORTION (%) AV = 1000 0.3 VCC = +15 V VEE = -15 V VO = 2.0 Vpp RL = 2.0 k TA = 25°C 0.2 AV = 100 0.1 AV = 10 10 100 1.0 k 10 k 108 AV = 1000 2.0 AV = 100 1.0 AV = 10 AV = 1.0 0 0 4.0 20 100 VCC = +15 V VEE = -15 V VO= -10 V to +10 V RL = 10 k f ≤ 10Hz -25 0 25 50 75 100 125 0 80 40 20 0 1.0 120 140 -10 1. Phase RL = 2.0 k 2. Phase RL = 2.0 k, CL = 300 pF -20 3. Gain RL = 2.0 k 4. Gain RL = 2.
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MC34071,2,4,A MC33071,2,4,A 70 VCC = +15 V VEE = -15 V RL = 2.0 k VO = -10 V to +10 V TA = 25°C 80 60 φ m , PHASE MARGIN (DEGREES) 40 20 0 10 100 1.0 k VCC = +15 V VEE = -15 V AV = +1.0 RL = 2.0 k to VO = -10 V to +10 V TA = 25°C 60 50 40 30 20 10 0 10 10 k 100 CL, LOAD CAPACITANCE (pF) Figure 23. Phase Margin versus Load Capacitance 14 80 A , m GAIN MARGIN (dB) 10 8.0 φ m , PHASE MARGIN (DEGREES) VCC = +15 V VEE = -15 V AV = +1.0 RL = 2.0 k to ∞ VO = -10 V to +10 V TA = 25°C 12 6.0 4.
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MC34071,2,4,A MC33071,2,4,A ∆ V , O OUTPUT VOLTAGE SWING FROM 0 V (V) SR, SLEW RATE (NORMALIZED) 1.15 VCC = +15 V VEE = -15 V AV = +1.0 RL = 2.0 k CL = 500 pF 1.1 1.05 1.0 0.95 10 5.0 0.85 -55 -25 0 25 50 75 100 125 TA, AMBIENT TEMPERATURE (°C) -10 Compensated Uncompensated 0 1.0 mV 0.5 1.0 1.5 VCC = +15 V VEE = -15 V AV = +1.0 RL = 2.0 k CL = 300 pF TA = 25°C 0 100 VCC = +15 V VEE = -15 V VCM = 0 V ∆VCM = ±1.5 V TA = 25°C 60 ADM ∆VCM 20 ∆VCM CMR = 20 Log 0 0.1 1.
PAGE 10
MC34071,2,4,A MC33071,2,4,A 105 TA = -55°C 8.0 7.0 TA = 25°C 6.0 TA = 125°C 5.0 4.0 0 5.0 10 15 20 25 85 +PSR = 20 Log 75 -PSR = 20 Log 65 -55 -25 0 ∆VO/ADM ADM ∆VCC ∆VO + ∆VO/ADM ∆VEE ∆VEE 25 ∆VCC 50 75 100 Figure 35. Power Supply Rejection versus Temperature VCC = +15 V VEE = -15 V TA = 25°C 40 20 10 +PSR (∆VCC = +1.5 V) Figure 34.
PAGE 11
MC34071,2,4,A MC33071,2,4,A minimum current sink capability, typically to an output voltage of (VEE +1.8 V). In single supply applications the output can directly source or sink base current from a common emitter NPN transistor for fast high current switching applications. In addition, the all NPN transistor output stage is inherently fast, contributing to the bipolar amplifier’s high gain bandwidth product and fast settling capability. The associated high frequency low output impedance (30 Ω typ @ 1.
PAGE 12
MC34071,2,4,A MC33071,2,4,A (Typical Single Supply Applications VCC = 5.0 V) VCC 5.1 M VO 0 3.7 Vpp 0 VCC 20 k 100 k 1.0 M Cin CO + VO MC34071 36.6 mVpp 68 k Cin 100 k Vin 1.0 k 10 k RL AV = 101 MC34071 - VO CO 10 k RL 100 k AV = 10 BW (-3.0 dB) = 450 kHz Figure 38. AC Coupled Noninverting Amplifier Figure 39. AC Coupled Inverting Amplifier VCC 4.75 Vpp 2.63 V + 10 k Vin 370 mVpp BW (-3.0 dB) = 45 kHz VO 3.7 Vpp 91 k 5.1 k RL 5.1 k 2.5 V + VO MC34071 100 k - 0 1.
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MC34071,2,4,A MC33071,2,4,A Vin CF 2.0 V RF 5.0 k 5.0 k 5.0 k Vin - VO MC34071 10 k 10 k + 10 k VO + MC34071 - VCC 1.0 V t 2.0 k RL VO 0.2 µs Delay 4.0 V Bit Switches 13 V/µs (R-2R) Ladder Network 25 V/µs 0.1 t Delay 1.0 µs Settling Time 1.0 µs (8-Bits, 1/2 LSB) Figure 44. Low Voltage Fast D/A Converter VCC Figure 45. High Speed Low Voltage Comparator ON" Vin < Vref VCC VCC + Vin RL MC34071 - Vref + + MC34071 MC34071 - - ON" Vin > Vref RL (A) PNP Figure 46.
PAGE 14
MC34071,2,4,A MC33071,2,4,A Hysteresis VO R2 Vref R1 VOH + MC34071 - Vin VinL = R1 (VOL-Vref)+Vref R1+R2 VinH = R1 (VOH-Vref)+Vref R1+R2 VH = R1 (VOH -VOL) R1+R Iout VOL VinL VinH Vref Vin Vin - Iout = Figure 50. Low Input Voltage Comparator with Hysteresis R1 R2 +Vref - 1/2 MC34072 + R VO R - + +V2 For (V2 ≥ V1), V > 0 Figure 52. High Input Impedance Differential Amplifier VO = Vref 2R2 (VO ≥ 0.1 V) 0.85 RC + IB V VO = Vin (pk) MC34071 ∆R RF Figure 53.
PAGE 15
MC34071,2,4,A MC33071,2,4,A GENERAL ADDITIONAL APPLICATIONS INFORMATION VS = ±15.0 V C2 0.02 R1 560 C2 0.05 - R2 5.6 k R3 510 C1 1.0 MC34071 C1 0.44 R1 46.1 k C1 1.0 fo = 1.0 kHz Ho = 10 + MC34071 R2 1.1 k Then: R1 = Choose: fo, Ho, C1 Choose: fo, Ho, C2 Then: C1 = 2C2 (Ho+1) R2 = 2 R3 = 4πfoC2 R2 Ho+1 R1 = R2 = R2 Ho C2 = Figure 56. Second Order Low–Pass Active Filter fo = 100 Hz Ho = 20 + Ho+0.5 πfoC1 2 2 2πfoC1 (1/Ho+2) C Ho Figure 57.
PAGE 16
MC34071,2,4,A MC33071,2,4,A + R R MC34074 R VO MC34074 RE + R - R MC34074 + Example: Let: R = RE = 12 k Then: AV = 3.0 BW = 1.5 MHz R AV = 1 + 2 R RE Figure 62. High Impedance Differential Amplifier +VO + + MC34074 100 k - 10 + 10 RL +10 MC34074 + 220 pF -10 100 k + + RL +VO -VO ∞ 18.93 -18.78 10 k 5.0 k 18 15.4 -18 -15.4 + MC34074 100 k - 10 RL 10 -VO Figure 63. Dual Voltage Doubler http://onsemi.
PAGE 17
MC34071,2,4,A MC33071,2,4,A ORDERING INFORMATION Op Amp Function Single Dual Quad Device Operating Temperature Range Package Shipping TA = 0° to +70°C DIP–8 SO–8 SO–8 / Tape & Reel 50 Units / Rail 98 Units / Rail 2500 Units / Tape & Reel MC33071P, MC33071AP MC33071D, MC33071AD MC33071DR2, MC33071ADR2 TA = –40° to +85°C DIP–8 SO–8 SO–8 / Tape & Reel 50 Units / Rail 98 Units / Rail 2500 Units / Tape & Reel MC34072P, MC34072AP MC34072D, MC34072AD MC34072DR2, MC34072ADR2 TA = 0° to +70°C DIP–8 S
PAGE 18
MC34071,2,4,A MC33071,2,4,A MARKING DIAGRAMS PDIP–8 P SUFFIX CASE 626 8 8 MC3x071P AWL YYWW 8 MC3x071AP AWL YYWW 1 1 8 MC3x072P AWL YYWW 1 8 MC3x072AP AWL YYWW MC34072VP AWL YYWW 1 1 8 8 SO–8 D SUFFIX CASE 751 8 8 8 3x071 ALYWA 3x071 ALYW 1 1 3x072 ALYWA 3x072 ALYW 3x072 ALYWV 1 1 1 PDIP–14 P SUFFIX CASE 646 14 14 MC3x074P AWLYYWW 1 14 MC3x074AP AWLYYWW 1 MC34074VP AWLYYWW 1 SO–14 D SUFFIX CASE 751A 14 14 1 14 14 MC3x074AD AWLYWW MC3x074D AWLYWW 1 TSSOP–14 DTB SUFFIX CA
PAGE 19
MC34071,2,4,A MC33071,2,4,A PACKAGE DIMENSIONS PDIP–8 P SUFFIX CASE 626–05 ISSUE L 8 NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5 –B– 1 4 DIM A B C D F G H J K L M N F –A– NOTE 2 L C J –T– MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC --10 0.76 1.01 INCHES MIN MAX 0.370 0.400 0.240 0.260 0.
PAGE 20
MC34071,2,4,A MC33071,2,4,A PACKAGE DIMENSIONS PDIP–14 P SUFFIX CASE 646–06 ISSUE M 14 8 1 7 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. B A F DIM A B C D F G H J K L M N L N C –T– SEATING PLANE J K H D 14 PL G M 0.13 (0.005) INCHES MIN MAX 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 BSC 0.
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MC34071,2,4,A MC33071,2,4,A PACKAGE DIMENSIONS TSSOP–14 DTB SUFFIX CASE 948G–01 ISSUE O 14X K REF 0.10 (0.004) 0.15 (0.006) T U M T U V S NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
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MC34071,2,4,A MC33071,2,4,A Notes http://onsemi.
PAGE 23
MC34071,2,4,A MC33071,2,4,A Notes http://onsemi.
PAGE 24
MC34071,2,4,A MC33071,2,4,A ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein.