Datasheet

ManualsBrandsON SEMICONDUCTOR ManualsDev KitsPCB design board

November, 2011 − Rev. 0

1 Publication Order Number:

NCL30051/D

NCL30051

PFC and Half-Bridge

Resonant Combo Controller

for LED Lighting

The NCL30051 is a combination of PFC and half−bridge resonant

controllers optimized for off−line LED lighting solutions. This

device integrates all the features needed to implement a highly

efficient and small form factor LED Driver/Power Supply. It contains

a critical conduction mode (CrM) power factor correction (PFC)

boost controller and a half−bridge resonant controller with a built−in

600 V driver. The half−bridge stage operates at a fixed frequency,

greatly simplifying the control implementations. The output (current

or voltage) regulation is achieved by adjusting the PFC stage output

voltage − based on a control signal generated external to the

NCL30051.

This device includes an enable input on the PFC feedback pin,

open feedback loop protection and PFC overvoltage and

undervoltage detectors. Other features included in the NCL30051 are

a 600 V startup circuit and an adjustable frequency oscillator with a

divide by 2 circuit to assure true symmetric duty ratio. The controllers

are properly sequenced, simplifying system design.

Features

• Voltage Mode CrM Power Factor Correction Controller

• PFC Open Feedback Loop Protection

• PFC Undervoltage Detector

• PFC Overvoltage Detector

• Half−Bridge Stage with 600 V High Side Gate Drive

• State Machine Ensures Proper Turn−on and Turn−off of

Half−Bridge Stage

• Controllers are Properly Sequenced for Fault Free Operation

• Non−Latching Fault Management

• Internal 600 V Startup Circuit

• Wide Temperature Range of −40°C to +125°C

• This is a Pb−Free Device

Typical Applications

• High Efficiency LED Drivers and Power Supplies

• Electronic Control Gear

• Lighting Ballasts

http://onsemi.com

Device Package Shipping

†

ORDERING INFORMATION

NCL30051DR2G SOIC−16

(Pb−Free)

2500/Tape & Reel

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specification

Brochure, BRD8011/D.

SOIC−16

D SUFFIX

CASE 751B

MARKING

DIAGRAM

A = Assembly Location

WL = Wafer Lot

Y = Year

WW = Work Week

G = Pb−Free Package

NCL30051G

AWLYWW

SOIC−16

PIN CONNECTIONS

HBoost

HDRVhi

HVS

HDRVlo

PDRV

PGND

VCC

PCT

OSC

GND

VREF

PFB

PCS

PZCD

PControl

Summary of content (16 pages)

PAGE 1
NCL30051 PFC and Half-Bridge Resonant Combo Controller for LED Lighting The NCL30051 is a combination of PFC and half−bridge resonant controllers optimized for off−line LED lighting solutions. This device integrates all the features needed to implement a highly efficient and small form factor LED Driver/Power Supply. It contains a critical conduction mode (CrM) power factor correction (PFC) boost controller and a half−bridge resonant controller with a built−in 600 V driver.
PAGE 2
NCL30051 VCC PDRV tPFC(off)Timer UVLO Disable ZCD Comparator 10V + − + PZCD UVLO VCC Good > 5.65 V Clamp VDD − VPREF On time Comparator Level Shifter PFC OVP Comparator IPCT(C) LEB + − + − PCS − PFCUVP Delay + − VPOVP HBoost HDRVhi Cboost HVS VCC HDRVlo Delay Q Clock Disable VCCGood CLK Q Q Enable PCS Comparator VPCS(ILIM) PDRV S Q UVLO R Figure 1. Functional Block Diagram http://onsemi.
PAGE 3
NCL30051 Table 1. PIN FUNCTION DESCRIPTION Pin Name Description 1 HV 2 OSC A capacitor on this pin adjusts the frequency of the internal oscillator. The oscillator sets the frequency of the half−bridge controller. Each half−bridge switch operates at half the oscillator frequency. The OSC pin also serves as a disable input for the half−bridge stage. The half−bridge stage is disabled by pulling down this pin below its disable threshold, VHB(DIS), typically 1.955 V. 3 GND Analog ground.
PAGE 4
NCL30051 Table 2. MAXIMUM RATINGS (Notes 1 and 2) Rating Symbol Value Unit High Voltage Input Voltage VHV −0.3 to 600 V High Voltage Input Current IHV 10 mA Supply Input Voltage VCC −0.3 to 20 V Supply Input Current ICC 10 mA Oscillator Input Voltage VOSC −0.3 to VREF V Oscillator Input Current IOSC 10 mA Bandgap Reference Decoupling Output Voltage VREF −0.3 to 9 V Bandgap Reference Decoupling Output Current IREF 10 mA PFC Feedback Voltage Input Voltage VPFB −0.
PAGE 5
NCL30051 Table 3. ELECTRICAL CHARACTERISTICS (VHV = open, VPFB = 2.4 V, VPCS = 0 V, VPZCD = 5 V, VPControl = open, VCC = 15 V, VPDRV = open, VHDRVlo = open, VHVS = 0 V, VHDRVhi = open, VHBoost = 15 V, COSC = 2200 pF, CVREF = 0.1 mF, CPCT = 1000 pF, for typical values TJ = 25°C, for min/max values, TJ is −40°C to 125°C, unless otherwise noted) Characteristics Conditions Symbol Min Typ Max Unit VCC Increasing VCC Decreasing VCC Decreasing VCC(on) VCC(enable) VCC(off) 14.3 13.6 8.5 15.3 14.6 9.
PAGE 6
NCL30051 Table 4. ELECTRICAL CHARACTERISTICS (VHV = open, VPFB = 2.4 V, VPCS = 0 V, VPZCD = 5 V, VPControl = open, VCC = 15 V, VPDRV = open, VHDRVlo = open, VHVS = 0 V, VHDRVhi = open, VHBoost = 15 V, COSC = 2200 pF, CVREF = 0.1 mF, CPCT = 1000 pF, for typical values TJ = 25°C, for min/max values, TJ is −40°C to 125°C, unless otherwise noted) Characteristics Conditions Symbol Min Typ Max Unit VPCS(ILIM) 0.78 0.84 0.
PAGE 7
NCL30051 Table 5. ELECTRICAL CHARACTERISTICS (VHV = open, VPFB = 2.4 V, VPCS = 0 V, VPZCD = 5 V, VPControl = open, VCC = 15 V, VPDRV = open, VHDRVlo = open, VHVS = 0 V, VHDRVhi = open, VHBoost = 15 V, COSC = 2200 pF, CVREF = 0.
PAGE 8
NCL30051 DETAILED OPERATING DESCRIPTION EMI AC Input Filter LBST DBST Vbulk T1 Cbulk QH QBST DR1 Cout Vout LR DR2 QL VREF 6 12 7 1 4 9 3 11 PCS PFB PDRV VCC PZCD HBoost HV VREF HDRVhi HVS PCT HDRVlo GND PControl PGND OSC 5 10 16 15 14 13 8 2 VCC VDD Z 2.5 V Z 2.5 V VDD Secondary Side Compensation (CCCV) Logic PWM Figure 2. Simplified Application Block Diagram OVERVIEW same time places constraints that have to be taken into account during the converter design.
PAGE 9
NCL30051 • Low pin-count of controller combines strong feature • • • • • • load current. The output voltage follows this discharge rate with a fixed ratio. By increasing the bulk capacitance value, this discharge rate can be slowed down increasing hold-up time. However, this approach has practical limits and is not recommended for applications requiring a long hold-up time with no output voltage variation. Figure 2 illustrates a typical NCL30051 2-stage converter implementation.
PAGE 10
NCL30051 PFC Output Capacitor - Cbulk inductance required. Thus, variation in PFC voltage results in higher boost inductor value and size (and/or higher ripple current when the output voltage is higher). The bulk capacitor is one of the most critical components in the PFC design. High value, high voltage capacitors are expensive and take up a large space.
PAGE 11
NCL30051 High Voltage Startup Circuit fOSC, OSCILLATOR FREQUENCY (kHz) 100 The NCL30051 internal startup regulator eliminates the need for external startup components. In addition, this regulator increases the efficiency of the supply as it uses no power when in the normal mode of operation, but instead uses power supplied by an auxiliary winding.
PAGE 12
NCL30051 ZCD Comparator PFC Regulator PZCD VDD < 2.25 V Clamp S Q Dominant Reset Latch Q R IPCT(C) PCT t + − VPREF On time Comparator Level Shifter PFC OVP Comparator + PFC UVP VPOVP − Comparator Figure 4. Inductor Current in CrM + VPUVP − PCS LEB + − (eq. 2) + − High power factor is achieved in CrM by maintaining a constant on time (ton) for a given RMS input voltage (Vac(RMS)) and load conditions. Equation 2 shows the relationship between on time and system operating conditions.
PAGE 13
NCL30051 PFC Startup Drain Voltage of PFC Switch The output of the error amplifier is pulled low with an internal pull down transistor when the supply voltage has not reached VCC(on) or if there is a PFC undervoltage fault. This ensures a soft−start sequence once the PFC is enabled and eliminates output voltage overshoot during on/off tests. Once the error amplifier is enabled the output of the error amplifier charges quickly to the minimum clamp voltage. PDRV 10 V VPZCD Figure 7.
PAGE 14
NCL30051 VPFC + V PREF @ R1 ) R2 ) I PFB @ R1 R2 VPCS(ILIM). This comparison is done on a cycle by cycle basis. The overcurrent threshold is typically 0.84 V. The current sense signal is prone to leading edge spikes caused by the power switch transitions. The NCL30051 has leading edge blanking circuitry that blocks out the first 110 ns (typical) of each current pulse. (eq. 5) A transconductance amplifier has a voltage−to−current gain, gm.
PAGE 15
NCL30051 A boost circuit comprised of Dboost and Cboost generates the supply voltage for the high side driver. Once HDRVlo turns on, the HVS pin is effectively grounded through the external power switch. This allows Cboost to charge to VCC. Once HDRVlo turns off, HVS floats high and Dboost is reversed biased. An undervoltage detector monitors the HBoost voltage. Once the HBoost voltage is greater than VBoost(UV), typically, 6.1 V, the high side driver is enabled.
PAGE 16
NCL30051 PACKAGE DIMENSIONS SOIC−16 CASE 751B−05 ISSUE K −A− 16 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 9 −B− P 1 8 PL 0.25 (0.