Datasheet
NCL30051
http://onsemi.com
7
Table 5. ELECTRICAL CHARACTERISTICS (V
HV
= open, V
PFB
= 2.4 V, V
PCS
= 0 V, V
PZCD
= 5 V, V
PControl
= open, V
CC
= 15 V,
V
PDRV
= open, V
HDRVlo
= open, V
HVS
= 0 V, V
HDRVhi
= open, V
HBoost
= 15 V, C
OSC
= 2200 pF, C
VREF
= 0.1 mF, C
PCT
= 1000 pF, for typical
values T
J
= 25°C, for min/max values, T
J
is −40°C to 125°C, unless otherwise noted)
Characteristics Conditions Symbol Min Typ Max Unit
HALF BRIDGE HIGH SIDE DRIVER
Half−Bridge High Side Driver Rise Time
10% to 90% (Note 5) t
HDRVhi(rise)
– 18 – ns
Half−Bridge High Side Driver Fall Time 90% to 10% (Note 5) t
HDRVhi(fall)
– 9 – ns
High State Voltage I
HDRVhi
= −4 mA V
HDRVhi(OH)
14.0 14.7 – V
Low State Voltage I
HDRVhi
= 4 mA V
HDRVhi(OL)
– 0.06 0.5 V
High Side Driver Duty Ratio 10 to 90% to 10% transitions,
V
HSVS
= 50 V (Note 5)
D
HDRVhiMAX
44 48 50 %
Boost Supply Undervoltage Threshold V
HBoost(UVLO)
4 6.1 8.0 V
Boost Current Consumption HDRVhi switching,
between HDRVhi and HVS (Note 5)
I
CC(Boost)
– 0.1 0.5 mA
HVS Leakage Current T
J
= 25°C, V
HVS
= 600 V,
V
HBoost
= 600 V
I
HVS(off)
– 0.1 1 mA
HALF BRIDGE LOW SIDE DRIVER
Half−Bridge Low Side Driver Rise Time 10% to 90% (Note 5) t
HDRVlo(rise)
– 18 – ns
Half−Bridge Low Side Driver Fall Time 90% to 10% (Note 5) t
HDRVhi(fall)
– 9 – ns
Half−Bridge Low Side Driver High State
Voltage
I
HDRVlo
= −4 mA V
HDRVlo(OH)
14 14.7 – V
Half−Bridge Low Side Driver Low State
Voltage
I
HDRVlo
= 4 mA V
HDRVlo(OL)
– 0.06 0.5 V
Half−Bridge Low Side Driver Duty Ratio 10 to 90% to 10% transitions
(Note 5)
D
HDRVloMAX
44 48 50 %
CROSSOVER DEAD TIME
Delay from HDRVlo high to low to
HDRVhi low to high transition
V
HVS
= 50 V t
HDRVhi(h−l)
500 785 950 ns
Delay from HDRVhi high to low to
HDRVlo low to high transition
V
HVS
= 50 V t
HDRVhi(h−l)
500 785 950 ns
HALF−BRIDGE DISABLE
Half−Bridge Disable V
OSC
Decreasing V
HB(DIS)
1.550 1.955 2.300 V
Half−Bridge Disable Hysteresis V
OSC
Increasing V
HB(DIS−HYS)
− 130 − mV
5. Resistor/capacitor parallel combination (39 pF || 20 kW) between drive pin and driver supply and between HDRVxx and GND pins.