Datasheet

NCL30081
http://onsemi.com
28
Figure 56. State Diagram for A Version Faults
With states: Reset
Stop
Run
V
CC
Disch.
4−s Timer
Latch
→
→
→
→
→
→
Controller is reset, I
CC
= I
CC(start)
Controller is ON, DRV is not switching
Normal switching
No switching, I
CC
= I
CC1
, waiting for V
CC
to decrease to V
CC(off)
the auto−recovery timer is counting, V
CC
is ramping up and down between V
CC(on)
and V
CC(off)
Controller is latched off, V
CC
is ramping up and down between V
CC(on)
and V
CC(off)
,
only V
CC(reset)
can release the latch.
Reset
Stop
4−s
Timer
Run
BO_NOK high
or TSD
or CS_Short
Latch
WOD_SCP or
Aux_SCP
Timer has
finished
counting
BO_NOK high
or TSD
or CS_Short
V
CC
> V
CC(on)
V
CC
< V
CC(off)
V
CC
Disch.
V
CC
< V
CC(off)
or
BO_NOK ↓
V
CC
_OVP
V
CC
< V
CC(reset)
V
CC
_OVP