Datasheet

NCL30100
http://onsemi.com
10
The current sense characteristic can be seen in Figure 22.
As illustrated, by varied the IVC current between 0 50 mA,
the sourcing current can range from 12.5 to 50 mA.
V
IVC Pin Sink Current
CS Pin Source Current
50 mA
12.5 mA
50 mA
0 mA
100 mA 140 mA
mA
Figure 22. Current Sense Regulation Characteristic
Biasing the controller
The NCL30010 Vcc input can range up to 18 V. For
applications that have an input voltage that is greater than
that level, an external resistor should be connected between
V
in
and the V
CC
supply capacitor. The value of the resistor
can be calculated as follows:
R
2
+
V
in
* V
CC
I
CC2
(eq. 2)
Where:
V
CC
Voltage at which IC operates (see spec.)
I
CC2
– Current at steady state operation
V
in
Input voltage
The I
CC
current is composed of two components: The
quiescent current consumption (300 mA) and the switching
current consumption. The driver consumption depends on
the MOSFET selected and the switching frequency. Total
current consumption can be calculated using following
formula:
I
CC
+ 300 @ 10
6
) C
MOSFET
@ V
CC
@ f
switching
(eq. 3)
In applications where the input voltage Vin is varying
dramatically, a zener can be used to limit the voltage going
into V
CC
, thus reducing the switching current contribution.
Switching Frequency
The switching frequency varies with the output load and
input voltage. The highest frequency appears at highest
input voltage. Since the peak inductor current is fixed, the
ontime portion of the switching period can be calculated:
t
on
+ L @
I
pk
V
in
) CS
delay
(eq. 4)
Where:
L Inductor inductance
I
pk
Peak current
As seen from the above equation, the turn on time depends
on the input voltage. In the case of a low voltage AC input
where there is ripple due to the time varying input voltage
and input rectifier, natural frequency dithering is produced
to improve the EMI signature of the LED driver.
The turn off time is determined by the charging of the
external capacitor connected to the CT pin. The minimum
t
off
value can be computed as:
t
off
+ C
T
@
V
offset
I
CT
) CT
delay
(eq. 5)
Where:
V
offset
Offset voltage (see parametric table)
I
CT
C
T
pin source current (see parametric table)
Finally, the switching frequency then can be evaluated by:
F
SW
+
1
t
on
) t
off
+
1
L@I
pk
V
in
)
C
T
@V
offset
50@10
6
) 435 @ 10
9
(eq. 6)
The sum of the nominal CS
delay
and CT
delay
is
approximately 435 nsec.