Datasheet

NCL30100
http://onsemi.com
8
Once the external MOSFET is switched on, the inductor
current starts to flow through the sense resistor R
CS
. The
current creates a voltage drop V
CS
on the resistor R
CS
, which
is negative with respect to GND. Since the comparator
connected to CS pin requires a positive voltage, a voltage
V
shift
is developed across the resistor R
shift
by a current
source which level−shifts the negative voltage V
CS
. The
level−shift current is in the range from 12.5 to 50 mA
depending on the optional input voltage compensation loop
control block signal (see more details in the input voltage
compensation section). The peak inductor current is equal
to:
I
pk
+
I
CS
@ R
shift
* V
th
R
CS
(eq. 1)
To achieve the best I
pk
precision, higher values of I
CS
should be used. The Equation 1 shows the higher drop on
R
CS
reduces the influence of the V
th
tolerance. Vth is the
comparator threshold which is nominally 38 mV.
A typical CS pin voltage waveform for continuous
condition mode is shown in Figure 16.
Figure 16. CS Pin Voltage
V
t
Switch
Turn on
0
I
shift = 50 mA
I
shift = 12.5 mA
Figure 16 also shows the effect of the inductor current
based on the range of control possible via the IVC input.
OFF Time Control
The internal current source, together with an external
capacitor, controls the switch−off time. In addition, the
optional IVC control signal can modulate the off time based
on input line voltage conditions. This block is illustrated in
Figure 17.
Figure 17. OFF Time Control
GND
CT
50 mA
To Latch’s Set Input
CT
VOffset
VOffset to VDD
To Latch’s Output
From Input Voltage
Compensation Block
During the switch−on time, the C
T
capacitor is kept
discharged by an internal switch. As soon as the latch output
changes to a low state, the I
source
is enabled and the voltage
across C
T
starts to ramp−up until its value reaches the
threshold given by the V
offset
. The current injected into IVC
can change this threshold. The IVC operation will be
discussed in the next section.
Figure 18. CT Pin Voltage
V
t
0
t
off−min
I1
I2
I3
Voffset
VDD
CT pin
Voltage
Goes Up
Goes Down
I
VC
I
VC
The voltage that can be observed on C
T
pin is shown in
Figure 18. The bold line shows the minimum IVC current
when the off time is at its minimum. The amount of current
injected into the IVC input can increase the off time by
changing the turn off comparator switching threshold. I1, I2,