Datasheet

NCP1351
http://onsemi.com
14
Figure 15. The Feedback Section Inside the NCP1351
C1
100n
+
-
Reset
V
CC
R
FB
45k
V
CC
D
FB
V
offset
500mV
+
I
FB
I
FB
I
FB
FB
IC
t
10
C
t
R1
2.5k
C
t
270p
Clock
I
diff
CS
R
offset
3.9k
I
diff
= ICS
max
- ICS
min
f
(IFB)
I
diff
ICS
min
V
CC
C3
22pF
to R
sense
The FB pin can actually be seen as a diode, forward biased
by the optocoupler current. The feedback current, I
FB
on
Figure 15, enter an internal 45 k resistor which develops
a voltage. This voltage becomes the variable threshold point
for the capacitor charge, as indicated by Figure 10. Thus, in
lack of feedback current (start-up or short-circuit), there is
no voltage across the 45 k and the series offset of 500 mV
clamps the capacitor swing. If a 270 pF capacitor is used, the
maximum switching frequency is 65 kHz.
Folding the frequency back at a rather high peak current
can obviously generate audible noise. For this reason, the
NCP1351 uses a patented current compression technique
which reduces the peak current in lighter load conditions. By
design, the peak current changes from 100% of its full load
value, to 30% of this value in light load conditions. This is
the block placed on the lower left corner of Figure 15. In full
load conditions, the feedback current is weak and all the
current flowing through the external offset resistor is:
I
CS
+ I
CS_min
) I
dif
+ I
CS_max
* I
CS_min
) I
CS_min
(eq. 13)
+ I
CS
_
max
As the load goes lighter, the feedback current increases and
starts to steal current away from the generators. Equation 12
can thus be updated by:
I
CS
+ I
CS_max
* kI
FB
(eq. 14)
Equation 13 testifies for the current reduction on the offset
generator, k represents an internal coefficient. When the
feedback current equals I
dif
, the offset becomes:
I
CS
+ I
CS_min
(eq. 15)