Datasheet

ManualsBrandsON SEMICONDUCTOR ManualsDev KitsPCB design board

November, 2005 − Rev. 1

1 Publication Order Number:

NCP5005/D

NCP5005

Compact Backlight LED

Boost Driver

The NCP5005 is a high efficiency boost converter operating in

current loop, based on a PFM mode, to drive White LED. The current

mode regulation allows a uniform brightness of the LEDs. The chip

has been optimized for small ceramic capacitors, capable to supply

up to 1.0 W output power.

Features

• 2.7 to 5.5 V Input Voltage Range

• V

out

to 24 V Output Compliance Allows up to 5 LEDs Drive in

Series

• Built−in Overvoltage Protection

• Full EMI Immunity

• Inductor Based Converter brings up to 90% Efficiency

• Constant Output Current Regulation

• 0.3 mA Standby Quiescent Current

• Includes Dimming Function (PWM)

• Enable Function Driven Directly from Low Battery Voltage Source

• Automatic LEDs Current Matching

• Thermal Shutdown Protection

• All Pins are Fully ESD Protected

• Low EMI Radiation

• Pb−Free Package is Available

Typical Applications

• LED Display Back Light Control

• Keyboard Back Light

• High Efficiency Step Up Converter

TSOP−5

SN SUFFIX

CASE 483

PIN CONNECTIONS

Device Package Shipping†

ORDERING INFORMATION

NCP5005SNT1G TSOP−5

(Pb−Free)

3000 Tape & Ree

MARKING

DIAGRAM

DBN = Device Code

A = Assembly Location

Y = Year

W = Work Week

G = Pb−Free Package

(Note: Microdot may be in either location)

DBNAYWG

3EN

out

2GND

bat

(Top View)

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specification

Brochure, BRD8011/D.

http://onsemi.com

Summary of content (23 pages)

PAGE 1
NCP5005 Compact Backlight LED Boost Driver The NCP5005 is a high efficiency boost converter operating in current loop, based on a PFM mode, to drive White LED. The current mode regulation allows a uniform brightness of the LEDs. The chip has been optimized for small ceramic capacitors, capable to supply up to 1.0 W output power. http://onsemi.com MARKING DIAGRAM Features • 2.7 to 5.
PAGE 2
NCP5005 Vbat Vbat U1 4 EN Vbat C1 5 4.7 mF L1 22 mH 2 GND GND GND D1 1 Vout 3 FB MBR0530 NCP5005 R1 D6 C2 1.0 mF D5 D4 D3 D2 GND 15 W GND LWT67C LWT67C LWT67C LWT67C LWT67C Figure 1. Typical Application Thermal Shutdown Current Sense Vbat 5 Vbat CONTROLLER Vsense EN 4 100 k 1 Vout Q1 GND FB 3 300 k − + 2 GND GND +200 mV Band Gap Figure 2. Block Diagram http://onsemi.
PAGE 3
NCP5005 PIN FUNCTION DESCRIPTION Pin Pin Name Type Description 1 Vout POWER This pin is the power side of the external inductor and must be connected to the external Schottky diode. It provides the output current to the load. Since the boost converter operates in a current loop mode, the output voltage can range up to +24 V but shall not extend this limit. However, if the voltage on this pin is higher than the Over Voltage Protection threshold (OVP) the device comes back to shutdown mode.
PAGE 4
NCP5005 MAXIMUM RATINGS Symbol Value Unit Power Supply Rating Vbat 6.0 V Output Power Supply Voltage Compliance Vout 28 V Digital Input Voltage Digital Input Current EN −0.3 < Vin < Vbat + 0.3 1.0 V mA 2.
PAGE 5
NCP5005 ANALOG SECTION (Typical values are referenced to TA = +25°C, Min & Max values are referenced −25°C to +85°C ambient temperature, unless otherwise noted.) Pin Symbol Min Typ Max Unit High Level Input Voltage Low Level Input Voltage 4 EN 1.3 − − − − 0.4 V V EN Pull Down Resistor 4 REN − 100 − kW Feedback Voltage Threshold 3 FB 185 200 225 mV Output Current Stabilization Time Delay following a DC/DC Start−up, @ Vbat = 3.
PAGE 6
NCP5005 Basically, the chip operates with two cycles: Cycle #1: time t1, the energy is stored into the inductor Cycle #2: time t2, the energy is dumped to the load The POR signal sets the flip−flop and the first cycle takes place. When the current hits the peak value, defined by the First Start−Up error amplifier associated to the loop regulation, the flip−flop resets, the NMOS is deactivated and the current is dumped into the load.
PAGE 7
NCP5005 Pout = f(Vbat) @ Rs = 2.0 W Ipeak = f(Vbat) @ Lout = 22 mH 400 1200 3 LED 1000 350 2 LED Ipeak (mA) 4 LED 5 LED 600 300 250 400 200 200 Pout = f(Vbat) @ Rsense = 2.0 W 0 150 2 3 4 Vbat (V) 5 2 6 3 4 Vbat (V) 5 6 Test conditions: L = 22 mH, Rsense = 10 W, Tamb = +20°C Figure 5. Maximum Output Power as a Function of the Battery Supply Voltage Figure 6.
PAGE 8
NCP5005 Output Current Range Set−Up The current regulation is achieved by means of an external sense resistor connected in series with the LED string. Vbat L1 22 mH D1 FB 3 Load Vout 1 Q1 CONTROLLER GND R1 xW GND Figure 8. Output Current Feedback A standard 5% tolerance resistor, 22 W SMD device, yields 9.09 mA, good enough to fulfill the back light demand. The typical application schematic diagram is provided in Figure 9.
PAGE 9
NCP5005 Output Load Drive The Schottky diode D1, associated with capacitor C2 (see Figure 9), provides a rectification and filtering function. When a pulse−operating mode is acceptable: • A PWM mode control can be used to adjust the output current range by means of a resistor and a capacitor connected across FB pin. On the other hand, the Schottky diode can be removed and replaced by at least one LED diode, keeping in mind such LED shall sustain the large pulsed peak current during the operation.
PAGE 10
NCP5005 Yield = f(Vbat) @ Iout = 40 mA/Lout = 22 mH Feedback Variation vs. Temperature 100 205 2 LED/40 mA 204 FEEDBACK VOLTAGE (mV) 90 80 YIELD (%) 70 5 LED/40 mA 4 LED/40 mA 60 3 LED/40 mA 50 40 30 20 10 203 202 Vbat = 3.1 V thru 5.5 V 201 200 199 198 197 196 0 2.50 3.00 3.50 4.00 Vbat (V) 4.50 5.00 195 −40 5.50 0 −20 20 40 60 100 80 TEMPERATURE (°C) All curve conditions: L = 22 mH, Cin = 4.7 mF, Cout = 1.0 mF, Typical curve @ T° = +25°C Figure 15.
PAGE 11
NCP5005 TYPICAL OPERATING WAVEFORMS Vout Inductor Current Conditions: Vbat = 3.6 V, Lout = 22 mH, 5 LED, Iout = 15 mA Figure 20. Typical Power Up Response Vload Inductor Current Conditions: Vbat = 3.6 V, Lout = 22 mH, 5 LED, Iout = 15 mA Figure 21. Typical Start−Up Inductor Current and Output Voltage http://onsemi.
PAGE 12
NCP5005 TYPICAL OPERATING WAVEFORMS Inductor Current Conditions: Vbat = 3.6 V, Lout = 22 mH, 5 LED, Iout = 15 mA Figure 22. Typical Inductor Current Vload Ripple 50 mV/div Inductor Current Conditions: Vbat = 3.6 V, Lout = 22 mH, 5 LED, Iout = 15 mA Figure 23. Typical Output Load Voltage Ripple http://onsemi.
PAGE 13
NCP5005 TYPICAL OPERATING WAVEFORMS Output Voltage Inductor Current Test Conditions: L = 22 mH, Iout = 15 mA, Vbat = 3.6 V, Ambient Temperature Figure 24. Typical Output Peak Voltage 92.00 EFFICIENCY (%) 90.00 ESR = 0.3 W 88.00 86.00 84.00 ESR = 1.3 W 82.00 80.00 78.00 3 3.5 4 4.5 5 5.5 Vbat (V) NCP5005: Efficiency = f(ESR) @ 5 LED, ILed = 20 mA Figure 25. Efficiency as a Function of Vbat and Inductor ESR http://onsemi.
PAGE 14
NCP5005 NOISE (mV/SQR/Hz) 10.00 1.00 0.10 0.01 0.1 1 10 100 FREQUENCY (MHz) Figure 26. Noise Returned to the Battery Test Conditions: Vbat = 3.6 V, Iout = 20 mA, string of 3 LED (OSRAM LWT67C) Figure 27. Relative EMI Over 100 kHz − 30 MHz Bandwidth http://onsemi.
PAGE 15
NCP5005 TYPICAL APPLICATIONS CIRCUITS Standard Feedback The standard feedback provides a constant current to the LED, independently of the Vbat supply and number of LED associated in series. Figure 28 depicts a typical application to supply 13 mA to the load. Vbat Vbat U1 4 C1 EN Vbat 5 4.7 mF L1 22 mH GND 2 3 GND GND D1 Vout 1 FB MBR0530 NCP5005 R1 D6 C2 1.0 mF D5 D4 D3 D2 GND 15 W GND LWT67C LWT67C LWT67C LWT67C LWT67C Figure 28.
PAGE 16
NCP5005 Vbat Vbat U1 4 C1 EN Vbat 5 4.7 mF L1 22 mH Average Network 2 GND R2 R3 150 k 10 k 3 PWM C3 100 nF GND D1 Vout 1 FB GND MBR0530 NCP5005 C2 1.0 mF R4 5.6 k GND GND R1 D6 D5 D4 D3 D2 GND 10 W LWT67C LWT67C LWT67C LWT67C LWT67C NOTE: RC filter R2 and C3 is optional (see text) Sense Resistor Figure 29. Basic DC Current Mode Operation with PWM Control value, preferably well below 1.0 MW. Consequently, let R2 = 150 k, R3 = 10 k and R4 = 5.6 k.
PAGE 17
NCP5005 Digital Control Cycle, but care must be observed as the DC/DC converter is continuously pulsed ON/OFF and noise are likely to be generated. Due to the EN pin, a digitally controlled luminosity can be implemented by providing a PWM signal to this pin (see Figure 31). The output current depends upon the Duty Vbat U1 4 Pulse EN Vbat C1 5 4.7 mF L1 22 mH GND 2 3 GND GND D1 Vout 1 FB Vload MBR0530 NCP5005 R1 GND 22 W D6 C2 1.
PAGE 18
NCP5005 PWM Vload VFB PWR CLK Figure 33. Operation @ PWM = 10 kHz, DC = 25% PWM Vload PWR CLK Figure 34. Magnified View of Operation @ PWM = 10 kHz, DC = 25% http://onsemi.
PAGE 19
NCP5005 NCP5005 Iout = f(PWM) @ f = 10 kHz 10.00 9.00 8.00 Digital EN Iout (mA) 7.00 Analog PWM 6.00 5.00 4.00 3.00 2.00 1.00 0.00 0 20 40 60 80 100 120 DC (%) Figure 35. Output Current as a Function of the Operating Condition Table 1. Recommended Passive Parts Part Manufacturer Description Part Number Ceramic Capacitor 1.0 mF/16 V MURATA GRM42 − X7R GRM42−6X7R−105K16 Ceramic Capacitor 1.0 mF/25 V MURATA GRM42 – X5R GRM Ceramic Capacitor 4.7 mF/6.
PAGE 20
NCP5005 Typical LEDs Load Mapping Since the output power is voltage battery limited (see Figure 5), one shall arrange the LED to cope with a specific need. In particular, since the power cannot extend 600 mW under realistic battery supply, powering ten LED can be achieved by a series/parallel combination as depicted in Figure 36. 50 mA 75 mA D1 LED D5 LED D2 LED D6 LED D3 LED D7 LED D4 LED D8 LED 7.0 V (Typ.) Load 14 V (Typ.
PAGE 21
NCP5005 Vbat J1 VBAT C1 GND J2 1 mF/10 V GROUND JP1 Isense GND C3 Vbat GND U1 EN 4 EN 2 GND 5 Vout 1 ENABLE GND TP2 FB GND FB 3 FB TP3 Vout D1 Vout Iout TP4 C2 MBR0530 NCP5005 1 mF/25 V Vbat 22 mH 3 2 1 1 mF/6.3 V L1 S1 VSW GND R1 Z1 GND GND 51R LW E67C LW E67C LW E67C LW E67C D2 D3 D4 D5 JP3 JUMP_6 Figure 37. NCP5005 Demo Board Schematic Diagram Figure 38. NCP5005 Demo Board Top Silkscreen http://onsemi.
PAGE 22
NCP5005 FIGURES INDEX Figure 1: Figure 2: Figure 3: Figure 4: Figure 5: Figure 6: Figure 7: Figure 8: Figure 9: Figure 10: Figure 11: Figure 12: Figure 13: Figure 14: Figure 15: Figure 16: Figure 17: Figure 18: Figure 19: Figure 20: Figure 21: Figure 22: Figure 23: Figure 24: Figure 25: Figure 26: Figure 27: Figure 28: Figure 29: Figure 30: Figure 31: Figure 32: Figure 33: Figure 34: Figure 35: Figure 36: Figure 37: Figure 38: Typical Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 23
NCP5005 PACKAGE DIMENSIONS TSOP−5 SN SUFFIX CASE 483−02 ISSUE C NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. A AND B DIMENSIONS DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. D S 5 4 1 2 3 B L MILLIMETERS INCHES DIM MIN MAX MIN MAX A 2.90 3.10 0.1142 0.1220 B 1.30 1.70 0.0512 0.0669 C 0.90 1.10 0.0354 0.