Datasheet

NCP5005
http://onsemi.com
6
Basically, the chip operates with two cycles:
Cycle #1: time t1, the energy is stored into the inductor
Cycle #2: time t2, the energy is dumped to the load
The POR signal sets the flip−flop and the first cycle takes
place. When the current hits the peak value, defined by the
error amplifier associated to the loop regulation, the
flip−flop resets, the NMOS is deactivated and the current
is dumped into the load. Since the timings depend on the
environment, the internal timer limits the toff cycle to
320 ns (typical), making sure the system operates in a
continuous mode to maximize the energy transfer.
Figure 4. Basic DC−DC Operation
First Start−Up Normal Operation
I
L
0 mA
Ids
0 mA
Io
0 mA
Iv
Ipeak
t
t
t
t1 t2
Based on the data sheet, the current flowing into the
inductor is bounded by two limits:
Ipeak Value: Internally fixed to 350 mA typical
Iv Value: Limited by the fixed Toff time built in the
chip (320 ns typical)
The system operates in a continuous mode as depicted in
Figure 4 and t
1
and t
2
times can be derived from basic
equations. (Note: The equations are for theoretical analysis
only, they do not include the losses.)
L + E*
dI
dt
(eq. 1)
Let V
bat
= E, then:
t1 +
(Ip * Iv) * L
V
bat
(eq. 2)
t2 +
(Ip * Iv) * L
Vo * V
bat
(eq. 3)
Since t
2
= 320 ns typical and Vo = 21 V maximum, then
(assuming a typical V
bat
= 3.0 V):
DI +
t2 * (Vo * V
bat)
L
(eq. 4)
DImax +
320 ns * (21−3.0)
22 mH
+ 261 mA
Of course, from a practical stand point, the inductor must
be sized to cope with the peak current present in the circuit
to avoid saturation of the core. On top of that, the ferrite
material shall be capable to operate at high frequency
(1.0 MHz) to minimize the Foucault’s losses developed
during the cycles.
The operating frequency can be derived from the
electrical parameters. Let V = Vo V
bat
, rearranging
Equation 1:
ton +
dI * L
E
(eq. 5)
Since toff is nearly constant (according to the 320 ns
typical time), the dI is constant for a given load and
inductance value. Rearranging Equation 5 yields:
ton +
V*dt
L
*L
E
(eq. 6)
Let E = V
bat
, and Vopk = output peak voltage, then:
ton +
(Vopk * V
bat
)*dt
V
bat
(eq. 7)
Finally, the operating frequency is:
f +
1
ton ) toff
(eq. 8)
The output power supplied by the NCP5005 is limited to
one watt: Figure 5 shows the maximum power that can be
delivered by the chip as a function of the output voltage.