Datasheet

NCP5612
http://onsemi.com
3
PIN FUNCTION DESCRIPTION
Pin No. Symbol Function Description
1 GND POWER This pin is the GROUND signal for the power analog blocks and must be
connected to the system ground. This pin is the GROUND reference for the
DC/DC converter and the output current control. The pin must be connected to
the system ground, a ground plane being strongly recommended.
2 LED1 INPUT, POWER This pin sinks to ground and monitors the current flowing into the first LED,
intended to be used in backlight application. The current is limited to 30 mA
maximum (Note 2).
The LED1 is deactivated when the ICON bit of the LED−REG register is High.
The LED1 is automatically disconnected when an open load is sensed pin 2
during the operation.
3 LED2 INPUT, POWER This pin sinks to ground and monitors the current flowing into the second LED,
intended to be used in backlight application. The current is limited to 30 mA
maximum (Note 2). The LED2 fulfills the ICON function, LED1 being
deactivated, when the ICON bit of the LED−REG register is High.
The LED2 is automatically disconnected when an open load is sensed pin 3
during the operation.
4 I
REF
INPUT, ANALOG This pin provides the reference current, based on the internal band−gap
voltage reference, to control the output current flowing in the LED. A 1%
tolerance, or better, resistor shall be used to get the highest accuracy of the
LED biases. An external current source can be used to bias this pin to dim the
light coming out of the LED.
In no case shall the voltage at pin 4 be forced either higher or lower than the
600 mV provided by the internal reference.
5 CNTL INPUT, DIGITAL This pin supports the flow of data between the external MCU and the
NCP5612 internal registers. The protocol makes profit of a Single Wire
structure associated to a Serial 8 bits format data flow.
6 NC − No internal connection
7 V
OUT
OUTPUT, POWER This pin provides the output voltage supplied by the DC/DC converter. The
V
out
pin must be decoupled to ground by a 1 mF ceramic capacitor located as
close as possible to the pin. Cares must be observed to minimize the parasitic
inductance at this pin. The circuit shall not operate without such bypass
capacitor connected across the V
out
pin and ground.
The output voltage is internally clamped to 5.5 V maximum in the event of no
load situation. On the other hand, the output current is limited to 40 mA
(typical) in the event of a short circuit to ground.
8 C2P POWER One side of the external charge pump capacitor (C
FLY
) is connected to this
pin, associated with C2N (Note 1)
9 C2N POWER One side of the external charge pump capacitor (C
FLY
) is connected to this
pin, associated with C2P (Note 1)
10 C1P POWER One side of the external charge pump capacitor (C
FLY
) is connected to this
pin, associated with C1N (Note 1)
11 V
BAT
INPUT, POWER Input Battery voltage to supply the analog and digital blocks. The pin must be
decoupled to ground by a 1.0 mF minimum ceramic capacitor.
12 C1N POWER One side of the external charge pump capacitor (C
FLY
) is connected to this
pin, associated with C1P (Note 1)
1. Using low ESR ceramic capacitor, 50 mW maximum, is mandatory to optimize the Charge Pump efficiency.
2. Total DC/DC output current is limited to 60 mA.