Data Sheet

©2004 Fairchild Semiconductor Corporation
RFD14N05L, RFD14N05LSM
Rev. C0
FIGURE 12. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
FIGURE 13. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 14. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
NOTE: Refer to Fairchild Application Notes AN7254 and AN7260,
FIGURE 15. TRANSCONDUCTANCE vs DRAIN CURRENT
Test Circuits and Waveforms
FIGURE 16. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 17. UNCLAMPED ENERGY WAVEFORMS
Typical Performance Curves Unless Otherwise Specified (Continued)
-80 -40 0 40 80 120 160
0
0.5
1.0
1.5
2.0
NORMALIZED GATE
THRESHOLD VOLTAGE
T
J
, JUNCTION TEMPERATURE (
o
C)
20
0
V
GS
= V
DS
, I
D
= 250µA
2.0
1.5
1.0
0.5
0
-80 -40 0 40 80 120 160
T
J
, JUNCTION TEMPERATURE (
o
C)
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
20
0
I
D
= 250µA
800
200
0
0 5 10 15 20 2
5
C, CAPACITANCE (pF)
400
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
C
ISS
C
OSS
C
RSS
600
V
GS
= 0V, f = 1MHz
C
ISS
= C
GS
+ C
GD
C
RSS
= C
GD
C
OSS
≈ C
DS
+ C
GD
40
30
20
10
0
20
I
GREF()
I
G ACT()
-------------------------
t, TIME (µs)
80
I
GREF()
I
GACT()
-------------------------
5
3
2
1
0
V
DD
= BV
DSS
V
DD
= BV
DSS
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
V
GS
, GATE TO SOURCE VOLTAGE (V)
R
L
= 3.57Ω
I
G(REF)
= 0.4mA
V
GS
= 5V
0.75 BV
DSS
0.50 BV
DSS
0.25 BV
DSS
50
4
t
P
V
GS
0.01Ω
L
I
AS
+
-
V
DS
V
DD
R
G
DUT
VARY t
P
TO OBTAIN
REQUIRED PEAK I
AS
0V
V
DD
V
DS
BV
DSS
t
P
I
AS
t
AV
0
RFD14N05L, RFD14N05LSM