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TPS731

SBVS034N –SEPTEMBER 2003–REVISED DECEMBER 2015

TPS731xx Capacitor-Free, NMOS, 150-mA Low Dropout Regulator With Reverse Current

Protection

1 Features 3 Description

The TPS731xx family of low-dropout (LDO) linear

• Stable With or Without Capacitors of All Types

voltage regulators uses a new topology: an NMOS

• Input Voltage Range of 1.7 V to 5.5 V

pass element in a voltage-follower configuration. This

• Ultralow Dropout Voltage: 30 mV Typical (150-mA

topology is stable using output capacitors with low

Load)

equivalent series resistance (ESR), and even allows

operation without a capacitor. The device also

• Excellent Load Transient Response—With or

provides high reverse blockage (low reverse current)

Without Optional Output Capacitor

and ground pin current that is nearly constant over all

• New NMOS Topology Provides Low Reverse

values of output current.

Leakage Current

The TPS731xx uses an advanced BiCMOS process

• Low Noise: 30 μV

RMS

Typical (10 kHz to 100 kHz)

to yield high precision while delivering very low

• 0.5% Initial Accuracy

dropout voltages and low ground pin current. Current

consumption, when not enabled, is less than 1 μA

• 1% Overall Accuracy Over Line, Load, and

and ideal for portable applications. The extremely low

Temperature

output noise (30 μV

RMS

with 0.1-μF C

) is ideal for

• Less Than 1-μA Maximum I

in Shutdown Mode

powering VCOs. These devices are protected by

• Thermal Shutdown and Specified Minimum and

thermal shutdown and foldback current limit.

Maximum Current Limit Protection

Device Information

(1)

• Available in Multiple Output Voltage Versions

PART NUMBER PACKAGE BODY SIZE (NOM)

– Fixed Outputs of 1.20 V to 5 V

TPS731xx SOT-23 (5) 2.90 mm × 1.60 mm

– Adjustable Outputs from 1.2 V to 5.5 V

(1) For all available packages, see the orderable addendum at

– Custom Outputs Available

the end of the data sheet.

2 Applications

• Smart Grid and Energy

• Building Automation

• Set-Top Boxes

• Medical Equipment

• Test and Measurement

• Point-of-Sale Terminals

• Wireless Infrastructure

Typical Application Circuit for Fixed-Voltage Versions

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

Summary of content (34 pages)

PAGE 1
Product Folder Sample & Buy Support & Community Tools & Software Technical Documents TPS731 SBVS034N – SEPTEMBER 2003 – REVISED DECEMBER 2015 TPS731xx Capacitor-Free, NMOS, 150-mA Low Dropout Regulator With Reverse Current Protection 1 Features 3 Description • • • The TPS731xx family of low-dropout (LDO) linear voltage regulators uses a new topology: an NMOS pass element in a voltage-follower configuration.
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TPS731 SBVS034N – SEPTEMBER 2003 – REVISED DECEMBER 2015 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications...........................................
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TPS731 www.ti.com SBVS034N – SEPTEMBER 2003 – REVISED DECEMBER 2015 5 Pin Configuration and Functions DBV Package 5-Pin SOT-23 Top View IN 1 GND 2 EN 3 5 OUT 4 NR/FB Pin Functions PIN NAME NO. I/O DESCRIPTION IN 1 I GND 2 — Input supply. EN 3 I Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator into shutdown mode. Refer to Enable Pin and Shutdown for more details. EN can be connected to IN if not used.
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TPS731 SBVS034N – SEPTEMBER 2003 – REVISED DECEMBER 2015 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over operating junction temperature range (unless otherwise noted) Voltage Peak output current (1) MIN MAX VIN –0.3 6 VEN –0.3 6 VOUT –0.3 5.5 VNR, VFB –0.
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TPS731 www.ti.com SBVS034N – SEPTEMBER 2003 – REVISED DECEMBER 2015 6.5 Electrical Characteristics Over operating temperature range (TJ = –40°C to +125°C), VIN = VOUT(nom) + 0.5 V (1), IOUT = 10 mA, VEN = 1.7 V, and COUT = 0.1 μF, unless otherwise noted. Typical values are at TJ = 25°C. PARAMETER TEST CONDITIONS VIN Input voltage range (1) VFB Internal reference (TPS73101) MIN TJ = 25°C 1.198 ΔVOUT(ΔVIN) Accuracy (1) Nominal TJ = 25°C VIN, IOUT, and T VOUT + 0.5 V ≤ VIN ≤ 5.
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TPS731 SBVS034N – SEPTEMBER 2003 – REVISED DECEMBER 2015 www.ti.com 6.6 Typical Characteristics For all voltage versions at TJ= 25°C, VIN = VOUT(nom) + 0.5 V, IOUT = 10 mA, VEN = 1.7 V, and COUT = 0.1 μF, unless otherwise noted. 0.5 0.20 Referred to IOUT = 10 mA 0.4 Change in VOUT (%) 0.3 Change in VOUT (%) Referred to VIN = VOUT + 0.5 V at IOUT = 10 mA 0.15 0.2 0.1 0 -0.1 -0.2 0.10 +25 °C +125 °C 0.05 0 -0.05 -40 °C -0.10 -0.3 -0.15 -0.4 -0.5 -0.
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TPS731 www.ti.com SBVS034N – SEPTEMBER 2003 – REVISED DECEMBER 2015 Typical Characteristics (continued) 700 700 600 600 500 500 IGND (mA) IGND (mA) For all voltage versions at TJ= 25°C, VIN = VOUT(nom) + 0.5 V, IOUT = 10 mA, VEN = 1.7 V, and COUT = 0.1 μF, unless otherwise noted. 400 300 200 IOUT = 150 mA 400 300 VIN = 5.5 V VIN = 4 V VIN = 2 V 200 VIN = 5.5 V VIN = 4 V VIN = 2 V 100 100 0 0 30 60 90 120 0 -50 150 -25 0 I OUT (mA) Figure 7.
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TPS731 SBVS034N – SEPTEMBER 2003 – REVISED DECEMBER 2015 www.ti.com Typical Characteristics (continued) For all voltage versions at TJ= 25°C, VIN = VOUT(nom) + 0.5 V, IOUT = 10 mA, VEN = 1.7 V, and COUT = 0.1 μF, unless otherwise noted. 90 40 IOUT = 100mA COUT = Any 70 40 35 30 IOUT = 1mA COUT = 10mF 60 50 IOUT = 1mA COUT = 1mF IO = 100mA C O = 1m F IOUT = 1mA COUT = Any 30 20 0 VIN = VOUT + 1V 10 100 1k 10k 25 20 15 Frequency = 10kHz COUT = 10mF VOUT = 2.
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TPS731 www.ti.com SBVS034N – SEPTEMBER 2003 – REVISED DECEMBER 2015 Typical Characteristics (continued) For all voltage versions at TJ= 25°C, VIN = VOUT(nom) + 0.5 V, IOUT = 10 mA, VEN = 1.7 V, and COUT = 0.1 μF, unless otherwise noted. VIN = 3.8 V COUT = 0 mF IOUT = 150 mA 40 mV/tick VOUT COUT = 0 mF 50 mV/div VOUT COUT = 1mF 40 mV/tick VOUT COUT = 10 mF 40 mV/tick VOUT COUT = 100 mF 50 mV/div VOUT dVIN 5.5 V 150 mA = 0.5 V/ms dt IOUT 25 mA/tick 4.
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TPS731 SBVS034N – SEPTEMBER 2003 – REVISED DECEMBER 2015 www.ti.com Typical Characteristics (continued) 60 160 55 140 50 120 45 100 IFB (nA) VN (rms) For all voltage versions at TJ= 25°C, VIN = VOUT(nom) + 0.5 V, IOUT = 10 mA, VEN = 1.7 V, and COUT = 0.1 μF, unless otherwise noted. 40 60 35 30 25 80 VOUT = 2.5 V COUT = 0 mF R1 = 39.2 kW 10 Hz < Frequency < 100 kHz 20 10p 100p 40 20 1n 10n 0 -50 -25 0 25 50 75 100 CFB (F) Temperature (°C) Figure 25.
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TPS731 www.ti.com SBVS034N – SEPTEMBER 2003 – REVISED DECEMBER 2015 7 Detailed Description 7.1 Overview The TPS731xx family of low-dropout linear regulators operates down to an input voltage of 1.7 V and supports output voltages down to 1.2 V while sourcing up to 150 mA of load current. This linear regulator uses an NMOS pass element with an integrated 4-MHz charge pump to provide a dropout voltage of less than 100 mV at full load current.
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TPS731 SBVS034N – SEPTEMBER 2003 – REVISED DECEMBER 2015 www.ti.com Functional Block Diagrams (continued) IN Standard 1% Resistor Values for Common Output Voltages 4-MHZ Charge Pump EN Thermal Protection Ref Servo 27 kW Bandgap Error Amp GND 80 kW 8 kW R1 R2 1.2 V Short Open 1.5 V 23.2 kW 95.3kW 1.8 V 28.0 kW 56.2 kW 2.5 V 39.2kW 36.5 kW 2.8 V 44.2 kW 33.2 kW 3.0 V 46.4 kW 30.9 kW 3.3 V 52.3 kW 30.1 kW NOTE: VOUT = (R1 + R2)/R2 × 1.204; R1 ǁ R2 @ 19 kW for best accuracy.
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TPS731 www.ti.com SBVS034N – SEPTEMBER 2003 – REVISED DECEMBER 2015 Feature Description (continued) The TPS731xx uses an internal charge pump to develop an internal supply voltage sufficient to drive the gate of the NMOS pass element above VOUT. The charge pump generates approximately 250 μV of switching noise at approximately 4 MHz; however, charge-pump noise contribution is negligible at the output of the regulator for most values of IOUT and COUT. 7.3.
PAGE 14
TPS731 SBVS034N – SEPTEMBER 2003 – REVISED DECEMBER 2015 www.ti.com 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.
PAGE 15
TPS731 www.ti.com SBVS034N – SEPTEMBER 2003 – REVISED DECEMBER 2015 Typical Applications (continued) 8.2.2 Detailed Design Procedure 8.2.2.1 Input and Output Capacitor Requirements Although an input capacitor is not required for stability, it is good analog design practice to connect a 0.1-μF to 1-μF, low ESR capacitor across the input supply near the regulator. This counteracts reactive input sources and improves transient response, noise rejection, and ripple rejection.
PAGE 16
TPS731 SBVS034N – SEPTEMBER 2003 – REVISED DECEMBER 2015 www.ti.com Typical Applications (continued) 8.2.3 Application Curves RL = 1 k W COUT = 0 mF RL = 20 W COUT = 10 mF VOUT RL = 20 W 1 V/div C O UT = 1 mF R L = 20 W C OUT = 1 mF 1 V/div RL = 1 kW COUT = 0 mF RL = 20 W COUT = 10 mF VOUT 2V 2V VEN 1 V/div 1 V/div 0V 0V 100 ms/div 100 ms/div Figure 33. TPS73133 Turnon Response 16 VEN Submit Documentation Feedback Figure 34.
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TPS731 www.ti.com SBVS034N – SEPTEMBER 2003 – REVISED DECEMBER 2015 9 Power Supply Recommendations These devices are designed to operate from an input voltage supply range between 1.7 V and 5.5 V. The input voltage range provides adequate headroom in order for the device to have a regulated output. This input supply must be well regulated. If the input supply is noisy, additional input capacitors with low ESR can help improve the output noise performance. 10 Layout 10.
PAGE 18
TPS731 SBVS034N – SEPTEMBER 2003 – REVISED DECEMBER 2015 www.ti.com Thermal Considerations (continued) 10.3.1 Power Dissipation The ability to remove heat from the die is different for each package type, presenting different considerations in the PCB layout. The PCB area around the device that is free of other components moves the heat from the device to the ambient air. Performance data for JEDEC low- and high-K boards are shown in the Thermal Information table.
PAGE 19
TPS731 www.ti.com SBVS034N – SEPTEMBER 2003 – REVISED DECEMBER 2015 11 Device and Documentation Support 11.1 Device Support 11.1.1 Development Support 11.1.1.1 Spice Models Computer simulation of circuit performance using SPICE is often useful when analyzing the performance of analog circuits and systems. A SPICE model for the TPS731 is available through the product folders under Tools & Software. 11.1.2 Device Nomenclature Table 1.
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TPS731 SBVS034N – SEPTEMBER 2003 – REVISED DECEMBER 2015 www.ti.com 11.4 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 15-Apr-2017 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production.
PAGE 24
PACKAGE MATERIALS INFORMATION www.ti.com 8-May-2018 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) TPS73101DBVR SOT-23 DBV 5 3000 178.0 9.0 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3.23 3.17 1.37 4.0 8.0 Q3 TPS73101DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 TPS731125DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.
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PACKAGE MATERIALS INFORMATION www.ti.com 8-May-2018 Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) TPS73150DBVR SOT-23 DBV 5 3000 178.0 9.0 TPS73150DBVT SOT-23 DBV 5 250 178.0 9.0 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3.23 3.17 1.37 4.0 8.0 Q3 3.23 3.17 1.37 4.0 8.
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PACKAGE MATERIALS INFORMATION www.ti.com 8-May-2018 Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS73132DBVT SOT-23 DBV 5 250 203.0 203.0 35.0 TPS73133DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS73133DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TPS73150DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS73150DBVT SOT-23 DBV 5 250 180.0 180.0 18.
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PACKAGE OUTLINE DBV0005A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 1.75 1.45 PIN 1 INDEX AREA 1 0.1 C B A 5 2X 0.95 1.9 1.45 MAX 3.05 2.75 1.9 2 4 0.5 5X 0.3 0.2 3 (1.1) C A B 0.15 TYP 0.00 0.25 GAGE PLANE 8 TYP 0 0.22 TYP 0.08 0.6 TYP 0.3 SEATING PLANE 4214839/C 04/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2.
PAGE 29
EXAMPLE BOARD LAYOUT DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK OPENING METAL SOLDER MASK OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MIN ARROUND 0.07 MAX ARROUND NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED SOLDER MASK DETAILS 4214839/C 04/2017 NOTES: (continued) 4.
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EXAMPLE STENCIL DESIGN DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X(0.95) 4 3 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214839/C 04/2017 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 7. Board assembly site may have different recommendations for stencil design. www.ti.
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PACKAGE OUTLINE DBV0005A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 1.75 1.45 PIN 1 INDEX AREA 1 0.1 C B A 5 2X 0.95 1.9 1.45 MAX 3.05 2.75 1.9 2 4 0.5 5X 0.3 0.2 3 (1.1) C A B 0.15 TYP 0.00 0.25 GAGE PLANE 8 TYP 0 0.22 TYP 0.08 0.6 TYP 0.3 SEATING PLANE 4214839/C 04/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2.
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EXAMPLE BOARD LAYOUT DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK OPENING METAL SOLDER MASK OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MIN ARROUND 0.07 MAX ARROUND NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED SOLDER MASK DETAILS 4214839/C 04/2017 NOTES: (continued) 4.
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EXAMPLE STENCIL DESIGN DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X(0.95) 4 3 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214839/C 04/2017 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 7. Board assembly site may have different recommendations for stencil design. www.ti.
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IMPORTANT NOTICE Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. TI’s published terms of sale for semiconductor products (http://www.ti.com/sc/docs/stdterms.