Datasheet

2006-01-23 4
SCE5780
Timing Diagram—Data Write Cycle
Timing Diagram—Instruction Cycle
Switching Specifications
(over operating temperature range and V
CC
=4.5 V to 5.5 V)
Symbol Description Min. Units
T
RC
Reset Active Time 600 ns
T
LDS
Load Setup Time 50 ns
T
DS
Data Setup Time 50 ns
T
SDCLK
Clock Period 200 ns
T
SDCW
Clock Width 70 ns
T
LDH
Load Hold Time 0 ns
T
DH
Data Hold Time 25 ns
T
WR
Total Write Time 2.2 µs
T
BL
Time Between Loads 600 ns
Note:
T
SDCW
is the minimum time the SDCLK may be low or high.
The SDCLK period must be a minimum of 200 ns.
SDCLK
SDCLK
T
SDCW
T
DATA
LOAD
D0
DS
T
LDS
T
T
DH
D7
LDH
T
LOAD
LOAD
DATA
DATA
SDCLK
SDCLK
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
D0
D0
BL
T
WR
T
OR