Datasheet

SCE5780
2006-01-23 5
Input/Output Circuits
The following two figures show the input and output resis-
tor/diode networks used for ESD protection and to elimi-
nate substrate latch-up caused by input voltage
over/under shoot.
Inputs Clock I/O
Electrical Characteristics (over operating temperature)
Parameter Min. Typ. Max. Units Conditions
V
CC
4.5 5.0 5.5 V
V
LL
3.0 5.5 V
I
CC
(PWR DWN)
4)
100 µA V
CC
=V
LL
=5.0 V, all inputs=0 V or V
CC
I
LL
(PWR DWN)
4)
50 µA
I
CC
2.0 mA V
CC
=5.0 V
I
LL
(20 dots/char)
1) 2)
240 345 mA V
CC
=V
LL
=5.0 V, “#” displayed in 8 digits,
brightness=100%, I
P
=100% at 25°C
I
IL
–10 µA V
CC
=5.0 V, all inputs=0 V
I
IH
10 µA V
CC
=V
IN
=5.0 V (all inputs)
V
IH
3.5 V V
CC
=4.5 V to 5.5 V
V
IL
1.5 V V
CC
=4.5 V to 5.5 V
I
OH
(CLK I/O) –8.9 mA V
CC
=4.5 V, V
OH
=2.4 V
I
OL
(CLK I/O) 1.6 mA V
CC
=4.5 V, V
OH
=0.4 V
θ
JC-pin
34 °C/W
Internal OSC Frequency 120 347 kHz V
CC
=5.0 V, CLKSEL=1, Prescale= ÷1
External OSC Frequency 120 347 kHz V
CC
=5.0 V, CLKSEL=0, Prescale= ÷1
External OSC Frequency with Prescale 1.92 5.55 MHz V
CC
=5.0 V, CLKSEL=0, Prescale= ÷16
Mux Frequency
3)
375 768 1086 Hz
Notes:
1)
Peak current=1.87 x I
LL
x I
LL
varies with V
LL
Normalized curve, Figure „I
LL
Variance (page 11).
2)
Unused inputs must be tied high.
3)
Mux rate=[OSC Frequency/ (64 x 7)].
4)
External oscillator must be stopped during power down mode for minimum current.
IDCD5021
GND
1 k
Input
CC
V
IDCD5026
GND
1 k
Input/Output
CC
V