User Manual

CLASSIFICATION
PRODUCT SPECIFICATION
No.
DS-9320-2400-102
REV.
1.1
SUBJECT
WI-FI IEEE 802.11 BGN FULL EMBEDDED MODULE
PAGE
21 of 43
CUSTOMER’S CODE
PAN9320 / PAN9310
PANASONIC’S CODE
ENW49A01x3EF & ENW49A02x3EF
DATE
14.03.2016
PANASONIC INDUSTRIAL DEVICES EUROPE GMBH
www.pideu.panasonic.de
UART1 timing diagram:
18.9.3. UART1 Dual Interface
UART1 dual interface bus signals:
Module Pin No
Signal Name
GPIO
definition
GPIO level
default
State
default
Description
9
UART1 CTS
OUT
-
-
Clear to send
10
UART1 RTS
IN
Request to send
11
UART1 TXD
IN
Transmit data output
12
UART1 RXD
OUT
Receive data input
27
DUAL STAT
OUT
HIGH
Binary data
UART1 state condition (binary or command)
28
DUAL SW
IN
UART1 toggle switch for binary / command
See Chapter 18.9.2 UART1 Binary Data Interface for specification of protocol and supported baud
rates.
The usage of the UART1 dual interface needs to be configured at the customer content of firmware.
After booting the MCU READY pin is changing from low to high level. For start condition the DUAL SW
input pin needs to be pre-set from the HOST by changing from high to low level. The DUAL STAT
output pin is signalling high level as Binary state. In this case the HOST is able to transmit or receive
binary data. To change from Binary to Command state the DUAL SW input pin needs to be toggled
(low - high - low level change) from the HOST: 1. The change of state is initiated by changing the
DUAL SW input pin from low to high level (set toggle switch). 2. After the DUAL STAT pin is changing
the state from high to low level the Command state is active and the DUAL SW input pin can be reset
from high to low level (reset toggle). 3. The HOST is now able to send commands. After the commands
are sent it is recommended to change back to Binary state by toggling the DUAL SW input pin again.
UART1 dual interface bus and control timing diagram: