User manual

High−level Instructions
3 − 81
Outline Divides 32-bit data by the divisor.
For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction
“P33 (PD%)” is not available.
Program example
Ladder
Diagram
Boolean
Ladder Diagram
Address Instruction
10 F33 D% , DT 10 , DT 20 , DT 30
S1
DS2
R0
Trigger
10
11
ST R 0
F 33 (D%)
DT 10
DT 20
DT 30
S1 32-bit equivalent constant or lower 16-bit area of 32-bit data (for dividend)
S2 32-bit equivalent constant or lower 16-bit area of 32-bit data (for divisor)
D Lower 16-bit area of 32-bit data (for quotient) (Remainder is stored in
special data registers DT9016 and DT9015/DT90016 and DT90015.)
Operands
Operand
Relay Timer/Counter Register
Index
register
Constant
Inde
x
Operand
WX WY WR
WL
(*1)
SV EV DT
LD
(*1)
FL
(*2)
IX
(*3)
IY
(*4)
K H
Index
modifier
S1 A A A A A A A A A A N/A A A A
S2 A A A A A A A A A A N/A A A A
D N/A A A A A A A A A A N/A N/A N/A A
(*1) This cannot be used with the FP0 and FP−e.
(*2) This cannot be used with the FP0, FP−e, FP0R, FPΣ, FP−X.
(*3) With the FP0R, FPΣ,FP−X, FP2, FP2SH, and FP10SH, this is I0 to IC.
(*4) With the FP0R, FPΣ,FP−X, FP2, FP2SH, and FP10SH, this is ID.
F33
P33
(PD%)
32-bit data division
[(S1+1, S1)/(S2+1, S2)
→ (D+1, D)…(DT9016, DT9015)/ (DT90016, DT90015)]
(D%)
A: Available
N/A: Not Available