Propeller Manual

1: Introducing the Propeller Chip
Chapter 1: Introducing the Propeller Chip
This chapter describes the Propeller chip hardware. To fully understand and use the Propeller
effectively, it’s important to first understand its hardware architecture. This chapter presents
the details of the hardware such as package types, package sizes, pin descriptions, and
functions.
Concept
The Propeller chip is designed to provide high-speed processing for embedded systems while
maintaining low current consumption and a small physical footprint. In addition to being
fast, the Propeller provides flexibility and power through its eight processors, called cogs,
that can perform simultaneous independent or cooperative tasks, all while maintaining a
relatively simple architecture that is easy to learn and utilize.
The resulting design of the Propeller frees application developers from common complexities
of embedded systems programming. For example:
• The memory map is flat. There is no need for paging schemes with blocks of code,
data or variables. This is a big time-saver during application development.
• Asynchronous events are easier to handle than they are with devices that use
interrupts. The Propeller has no need for interrupts; just assign some cogs to
individual, high-bandwidth tasks and keep other cogs free and unencumbered. The
result is a more responsive application that is easier to maintain.
• The Propeller Assembly language features conditional execution and optional result
writing for each individual instruction. This makes critical, multi-decision blocks of
code more consistently timed; event handlers are less prone to jitter and developers
spend less time padding, or squeezing, cycles here and there.
Propeller Manual v1.1 · Page 13