Propeller Manual
Table Of Contents
- Preface
- Chapter 1 : Introducing the Propeller Chip
- Concept
- Package Types
- Pin Descriptions
- Specifications
- Hardware Connections
- Boot Up Procedure
- Run-Time Procedure
- Shutdown Procedure
- Block Diagram
- Shared Resources
- System Clock
- Cogs (processors)
- Hub
- I/O Pins
- System Counter
- CLK Register
- Locks
- Main Memory
- Main RAM
- Main ROM
- Character Definitions
- Log and Anti-Log Tables
- Sine Table
- Boot Loader and Spin Interpreter
- Chapter 2 : Spin Language Reference
- Structure of Propeller Objects/Spin
- Categorical Listing of Propeller Spin Language
- Spin Language Elements
- ABORT
- BYTE
- BYTEFILL
- BYTEMOVE
- CASE
- CHIPVER
- CLKFREQ
- _CLKFREQ
- CLKMODE
- _CLKMODE
- CLKSET
- CNT
- COGID
- COGINIT
- COGNEW
- COGSTOP
- CON
- CONSTANT
- Constants (pre-defined)
- CTRA, CTRB
- DAT
- DIRA, DIRB
- FILE
- FLOAT
- _FREE
- FRQA, FRQB
- IF
- IFNOT
- INA, INB
- LOCKCLR
- LOCKNEW
- LOCKRET
- LOCKSET
- LONG
- LONGFILL
- LONGMOVE
- LOOKDOWN, LOOKDOWNZ
- LOOKUP, LOOKUPZ
- NEXT
- OBJ
- Operators
- Expression Workspace
- Operator Attributes
- Unary / Binary
- Normal / Assignment
- Constant and/or Variable Expression
- Level of Precedence
- Intermediate Assignments
- Constant Assignment ‘=’
- Variable Assignment ‘:=’
- Add ‘+’, ‘+=’
- Positive ‘+’ (unary form of Add)
- Subtract ‘-’, ‘-=’
- Negate ‘-’ (unary form of Subtract)
- Decrement, pre- or post- ‘- -’
- Increment, pre- or post- ‘+ +’
- Multiply, Return Low ‘*’, ‘*=’
- Multiply, Return High ‘**’, ‘**=’
- Divide ‘/’, ‘/=’
- Modulus ‘//’, ‘//=’
- Limit Minimum ‘#>’, ‘#>=’
- Limit Maximum ‘<#’, ‘<#=’
- Square Root ‘^^’
- Absolute Value ‘||’
- Sign-Extend 7 or Post-Clear ‘~’
- Sign-Extend 15 or Post-Set ‘~~’
- Shift Arithmetic Right ‘~>’, ‘~>=’
- Random ‘?’
- Bitwise Decode ‘|<’
- Bitwise Encode ‘>|’
- Bitwise Shift Left ‘<<’, ‘<<=’
- Bitwise Shift Right ‘>>’, ‘>>=’
- Bitwise Rotate Left ‘<-’, ‘<-=’
- Bitwise Rotate Right ‘->’, ‘->=’
- Bitwise Reverse ‘><’, ‘><=’
- Bitwise AND ‘&’, ‘&=’
- Bitwise OR ‘|’, ‘|=’
- Bitwise XOR ‘^’, ‘^=’
- Bitwise NOT ‘!’
- Boolean AND ‘AND’, ‘AND=’
- Boolean OR ‘OR’, ‘OR=’
- Boolean NOT ‘NOT’
- Boolean Is Equal ‘==’, ‘===’
- Boolean Is Not Equal ‘<>’, ‘<>=’
- Boolean Is Less Than ‘<’, ‘<=’
- Boolean Is Greater Than ‘>’, ‘>=’
- Boolean Is Equal or Less ‘=<’, ‘=<=’
- Boolean Is Equal or Greater ‘=>’, ‘=>=’
- Symbol Address ‘@’
- Object Address Plus Symbol ‘@@’
- OUTA, OUTB
- PAR
- PHSA, PHSB
- PRI
- PUB
- QUIT
- REBOOT
- REPEAT
- RESULT
- RETURN
- ROUND
- SPR
- _STACK
- STRCOMP
- STRING
- STRSIZE
- Symbols
- TRUNC
- VAR
- VCFG
- VSCL
- WAITCNT
- WAITPEQ
- WAITPNE
- WAITVID
- WORD
- WORDFILL
- WORDMOVE
- _XINFREQ
- Chapter 3 : Assembly Language Reference
- The Structure of Propeller Assembly
- Categorical Listing of Propeller Assembly Language
- Assembly Language Elements
- ABS
- ABSNEG
- ADD
- ADDABS
- ADDS
- ADDSX
- ADDX
- AND
- ANDN
- CALL
- CLKSET
- CMP
- CMPS
- CMPSUB
- CMPSX
- CMPX
- CNT
- COGID
- COGINIT
- COGSTOP
- Conditions ( IF_x )
- CTRA, CTRB
- DIRA, DIRB
- DJNZ
- Effects ( WC, WZ, WR, NR )
- FIT
- FRQA, FRQB
- HUBOP
- IF_x (Conditions)
- INA, INB
- JMP
- JMPRET
- LOCKCLR
- LOCKNEW
- LOCKRET
- LOCKSET
- MAX
- MAXS
- MIN
- MINS
- MOV
- MOVD
- MOVI
- MOVS
- MUXC
- MUXNC
- MUXNZ
- MUXZ
- NEG
- NEGC
- NEGNC
- NEGNZ
- NEGZ
- NOP
- NR
- Operators
- OR
- ORG
- OUTA, OUTB
- PAR
- PHSA, PHSB
- RCL
- RCR
- RDBYTE
- RDLONG
- RDWORD
- Registers
- RES
- RET
- REV
- ROL
- ROR
- SAR
- SHL
- SHR
- SUB
- SUBABS
- SUBS
- SUBSX
- SUBX
- SUMC
- SUMNC
- SUMZ
- Symbols
- TEST
- TESTN
- TJNZ
- TJZ
- VCFG
- VSCL
- WAITCNT
- WAITPEQ
- WAITPNE
- WAITVID
- WC
- WR
- WRBYTE
- WRLONG
- WRWORD
- WZ
- XOR
- Appendix A: Reserved Word List
- Appendix B: Math Samples and Function Tables
- Index
1: Introducing the Propeller Chip
Figure 1-3: Cog-Hub Interaction – Best Case Scenario
Figure 1-4 shows the worst-case scenario; the hub instruction was ready on the cycle right
after the start of Cog 0’s access window; it just barely missed it. The cog waits until the next
hub access window (15 cycles later) then the hub instruction executes (7 cycles) for a total of
22 cycles for that hub instruction. Again, there are 9 additional cycles after the hub
instruction for other instructions to execute before the next hub access window arrives. To
get the most efficiency out of Propeller Assembly routines that have to frequently access
mutually exclusive resources, it can be beneficial to interleave non-hub instructions with hub
instructions to lessen the number of cycles waiting for the next hub access window. Since
most Propeller Assembly instructions take 4 clock cycles, two such instructions can be
executed in between otherwise contiguous hub instructions.
Figure 1-4: Cog-Hub Interaction – Worst Case Scenario
Keep in mind that a particular cog’s hub instructions do not, in any way, interfere with other
cogs’ instructions because of the Hub mechanism. Cog 1, for example, may start a hub
instruction during System Clock cycle 2, in both of these examples, possibly overlapping its
execution with that of Cog 0 without any ill effects. Meanwhile, all other cogs can continue
executing non-hub instructions, or awaiting their individual hub access windows regardless of
what the others are doing.
Propeller Manual v1.1 · Page 25