User's Manual

31-3MDR00HB Page 44 Installation
Draft
Note:
HDLC 0 is used for VDL Mode 2 operation.
HDLC 1 is reserved.
11 HDLC 1 CL B RS422 differential synchronous data at 128 kbits per
second.
Output
12 Squelch Solid state relay configurable to be normally open or
normally closed. Between +60 and -60 V ac or dc may be
applied drawing 100 mA maximum.
Output
13 Ground 0 V.
14
Line in
+
Pair to pin 2. Input
15 Ground 0 V.
16 Ground 0 V. –
17 Line out – Pair to pin 4. Output
18 HDLC 0 TX A Pair to pin 6. Output
19 HDLC 0 RX A Pair to pin 7. Input
20 HDLC 0 CL A Pair to pin 8. Output
21 HDLC 1 TX A Pair to pin 9. Output
22 HDLC 1 RX A Pair to pin 10. Input
23 HDLC 1 CL A Pair to pin 11. Output
24 Time 0 5 V CMOS Input
25 PTT Active when the input differs from the reference by more
than 10 V. Reference voltage (common to phantom PTT
input on pin 2) is programmable to be +14, 0 or -14 V (all
±1 V).
Inactive when the input differs from the reference by less
than 1 V
Maximum input level ±60 V with respect to reference.
Input requires at least 1 mA to operate and draws no
more that 6 mA.
Configurable active high or low.
Input
Table 11 Facilities Connector (Continued)
Pin Signal Name Characteristic Input or Output