User manual
Anhang 4-3
Anordnung des Codes im EEPROM/RAM
A. Kontaktplan (
Hinweis: L = Low-Byte , H = High-Byte)
Seite Adresse Position Code
1 A000h X1 H C3 C2 C1 C0 N3 N2 N1 N0
X2 L C3 C2 C1 C0 N3 N2 N1 N0
A001h X3 H C3 C2 C1 C0 N3 N2 N1 N0
X4 L C3 C2 C1 C0 N3 N2 N1 N0
A002h X5 H C3 C2 C1 C0 N3 N2 N1 N0
X6 L C3 C2 C1 C0 N3 N2 N1 N0
A003h X7 H C3 C2 C1 C0 N3 N2 N1 N0
X8 L C3 C2 C1 C0 N3 N2 N1 N0
A004h X9 H C3 C2 C1 C0 N3 N2 N1 N0
X10 L C3 C2 C1 C0 N3 N2 N1 N0
A005h X11 H C3 C2 C1 C0 N3 N2 N1 N0
X12 L C3 C2 C1 C0 N3 N2 N1 N0
A006h Y1 H C3 C2 C1 C0 N3 N2 N1 N0
Y2 L C3 C2 C1 C0 N3 N2 N1 N0
A007h Y3 H C3 C2 C1 C0 N3 N2 N1 N0
Y4 L C3 C2 C1 C0 N3 N2 N1 N0
A008h V1–V4 H V4 V3 V2 V1 0 0 0 0
V5–V8 L V8 V7 V6 V5 0 0 0 0
A009h V9–V12 H V12 V11 V10 V9 0 0 0 0
Reserviert L 0 0 0 0 0 0 0 0